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| author | Sebastian Peryt <sebastian.peryt@intel.com> | 2018-05-14 13:22:53 +0200 |
|---|---|---|
| committer | Sebastian Peryt <speryt@gcc.gnu.org> | 2018-05-14 13:22:53 +0200 |
| commit | f8d9957ef899acf54c01f0289b586871c846402a (patch) | |
| tree | a510214cf8c481a6ccea2d7d3b1c9c54bcfd9d4b /gcc/doc | |
| parent | 485fa7041bee21893c7db73884e9a87ac8eb286a (diff) | |
| download | gcc-f8d9957ef899acf54c01f0289b586871c846402a.zip gcc-f8d9957ef899acf54c01f0289b586871c846402a.tar.gz gcc-f8d9957ef899acf54c01f0289b586871c846402a.tar.bz2 | |
i386-common.c (OPTION_MASK_ISA_CLDEMOTE_SET, [...]): New defines.
2018-05-14 Sebastian Peryt <sebastian.peryt@intel.com>
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_CLDEMOTE_SET,
OPTION_MASK_ISA_CLDEMOTE_UNSET): New defines.
(ix86_handle_option): Handle -mcldemote.
* config.gcc: New header.
* config/i386/cldemoteintrin.h: New file.
* config/i386/cpuid.h (bit_CLDEMOTE): New bit.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
-mcldemote.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
OPTION_MASK_ISA_CLDEMOTE.
* config/i386/i386.c (ix86_target_string): Add -mcldemote.
(ix86_valid_target_attribute_inner_p): Ditto.
(enum ix86_builtins): Add IX86_BUILTIN_CLDEMOTE.
(ix86_init_mmx_sse_builtins): Define __builtin_ia32_cldemote.
(ix86_expand_builtin): Expand IX86_BUILTIN_CLDEMOTE.
* config/i386/i386.h (TARGET_CLDEMOTE, TARGET_CLDEMOTE_P): New.
* config/i386/i386.md (UNSPECV_CLDEMOTE): New.
(cldemote): New.
* config/i386/i386.opt: Add -mcldemote.
* config/i386/x86intrin.h: New header.
* doc/invoke.texi: Add -mcldemote.
gcc/testsuite/
* gcc.target/i386/cldemote-1.c: New test.
From-SVN: r260224
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/invoke.texi | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 8066fd3..462aedc 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1260,7 +1260,8 @@ See RS/6000 and PowerPC Options. -mlzcnt -mbmi2 -mfxsr -mxsave -mxsaveopt -mrtm -mlwp -mmpx @gol -mmwaitx -mclzero -mpku -mthreads -mgfni -mvaes -mwaitpkg @gol -mshstk -mforce-indirect-call -mavx512vbmi2 @gol --mvpclmulqdq -mavx512bitalg -mmovdiri -mmovdir64b -mavx512vpopcntdq @gol +-mvpclmulqdq -mavx512bitalg -mmovdiri -mmovdir64b -mavx512vpopcntdq +-mcldemote @gol -mms-bitfields -mno-align-stringops -minline-all-stringops @gol -minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol -mmemcpy-strategy=@var{strategy} -mmemset-strategy=@var{strategy} @gol @@ -27263,14 +27264,17 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. @need 200 @itemx -mavx512vpopcntdq @opindex mavx512vpopcntdq +@need 200 +@itemx -mcldemote +@opindex mcldemote These switches enable the use of instructions in the MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, AVX, AVX2, AVX512F, AVX512PF, AVX512ER, AVX512CD, SHA, AES, PCLMUL, FSGSBASE, RDRND, F16C, FMA, SSE4A, FMA4, XOP, LWP, ABM, AVX512VL, AVX512BW, AVX512DQ, AVX512IFMA, AVX512VBMI, BMI, BMI2, VAES, WAITPKG, FXSR, XSAVE, XSAVEOPT, LZCNT, RTM, MPX, MWAITX, PKU, IBT, SHSTK, AVX512VBMI2, GFNI, VPCLMULQDQ, AVX512BITALG, MOVDIRI, MOVDIR64B, -AVX512VPOPCNTDQ3DNow!@: or enhanced 3DNow!@: extended instruction sets. -Each has a corresponding @option{-mno-} option to disable use of these +AVX512VPOPCNTDQ, CLDEMOTE, 3DNow!@: or enhanced 3DNow!@: extended instruction +sets. Each has a corresponding @option{-mno-} option to disable use of these instructions. These extensions are also available as built-in functions: see |