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author | Sandra Loosemore <sandra@codesourcery.com> | 2013-12-11 11:50:05 -0500 |
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committer | Bernd Edlinger <edlinger@gcc.gnu.org> | 2013-12-11 16:50:05 +0000 |
commit | f5d4f18c5332e5235b53f4b9496ef4e498e92f1f (patch) | |
tree | 1adfbe0c18fd93a2d8326c0ccef386d4e2b54fed /gcc/doc | |
parent | 2ccd6f727633d25730154efd7094900d24bf6544 (diff) | |
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re PR middle-end/23623 (volatile keyword changes bitfield access size from 32bit to 8bit)
2013-12-11 Sandra Loosemore <sandra@codesourcery.com>
PR middle-end/23623
PR middle-end/48784
PR middle-end/56341
PR middle-end/56997
gcc/
* expmed.c (strict_volatile_bitfield_p): New function.
(store_bit_field_1): Don't special-case strict volatile
bitfields here.
(store_bit_field): Handle strict volatile bitfields here instead.
(store_fixed_bit_field): Don't special-case strict volatile
bitfields here.
(extract_bit_field_1): Don't special-case strict volatile
bitfields here.
(extract_bit_field): Handle strict volatile bitfields here instead.
(extract_fixed_bit_field): Don't special-case strict volatile
bitfields here. Simplify surrounding code to resemble that in
store_fixed_bit_field.
* doc/invoke.texi (Code Gen Options): Update
-fstrict-volatile-bitfields description.
gcc/testsuite/
* gcc.dg/pr23623.c: New test.
* gcc.dg/pr48784-1.c: New test.
* gcc.dg/pr48784-2.c: New test.
* gcc.dg/pr56341-1.c: New test.
* gcc.dg/pr56341-2.c: New test.
* gcc.dg/pr56997-1.c: New test.
* gcc.dg/pr56997-2.c: New test.
* gcc.dg/pr56997-3.c: New test.
From-SVN: r205896
Diffstat (limited to 'gcc/doc')
-rw-r--r-- | gcc/doc/invoke.texi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 782a472..b655a64 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -22001,6 +22001,12 @@ instruction, even though that accesses bytes that do not contain any portion of the bit-field, or memory-mapped registers unrelated to the one being updated. +In some cases, such as when the @code{packed} attribute is applied to a +structure field, it may not be possible to access the field with a single +read or write that is correctly aligned for the target machine. In this +case GCC falls back to generating multiple accesses rather than code that +will fault or truncate the result at run time. + The default value of this option is determined by the application binary interface for the target processor. |