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| author | Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> | 2015-06-04 09:19:51 +0000 |
|---|---|---|
| committer | Ramana Radhakrishnan <ramana@gcc.gnu.org> | 2015-06-04 09:19:51 +0000 |
| commit | e93ca5cadeb71a04b2f8ef2ebcbadb2f0213d878 (patch) | |
| tree | b1f66152fa773d5b7dac557924b8c752070f198e /gcc/doc | |
| parent | e2fc719399b507122ef4ea1867cff58e214be912 (diff) | |
| download | gcc-e93ca5cadeb71a04b2f8ef2ebcbadb2f0213d878.zip gcc-e93ca5cadeb71a04b2f8ef2ebcbadb2f0213d878.tar.gz gcc-e93ca5cadeb71a04b2f8ef2ebcbadb2f0213d878.tar.bz2 | |
Remove TARGET_RELAXED_ORDERING and optimize for weak memory models.
This patch removes the special casing for targets with relaxed
memory ordering and handles guard accesses with equivalent
atomic load acquire operations. In this process we change the
algorithm to load the guard variable with an atomic load that
has ACQUIRE semantics.
This then means that on targets which have weak memory models, the
fast path is inlined and can directly use a load-acquire instruction
where available (and yay! one more hook gone).
2015-06-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR c++/66192
PR target/66200
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (TARGET_RELAXED_ORDERING): Delete.
* target.def (TARGET_RELAXED_ORDERING): Likewise.
* config/alpha/alpha.c (TARGET_RELAXED_ORDERING): Likewise.
* config/ia64/ia64.c (TARGET_RELAXED_ORDERING): Likewise.
* config/rs6000/rs6000.c (TARGET_RELAXED_ORDERING): Likewise.
* config/sparc/linux.h (SPARC_RELAXED_ORDERING): Likewise.
* config/sparc/linux64.h (SPARC_RELAXED_ORDERING): Likewise.
* config/sparc/sparc.c (TARGET_RELAXED_ORDERING): Likewise.
* config/sparc/sparc.h (SPARC_RELAXED_ORDERING): Likewise.
* system.h (TARGET_RELAXED_ORDERING): Poison.
2015-06-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR c++/66192
PR target/66200
* cp-tree.h (get_guard_cond): Adjust declaration
* decl.c (expand_static_init): Use atomic load acquire
and adjust call to get_guard_cond.
* decl2.c (build_atomic_load_byte): New function.
(get_guard_cond): Handle thread_safety.
(one_static_initialization_or_destruction): Adjust call to
get_guard_cond.
From-SVN: r224118
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/tm.texi | 10 | ||||
| -rw-r--r-- | gcc/doc/tm.texi.in | 2 |
2 files changed, 0 insertions, 12 deletions
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index f2f3497..a16cd92 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -11395,16 +11395,6 @@ routine for target specific customizations of the system printf and scanf formatter settings. @end defmac -@deftypevr {Target Hook} bool TARGET_RELAXED_ORDERING -If set to @code{true}, means that the target's memory model does not -guarantee that loads which do not depend on one another will access -main memory in the order of the instruction stream; if ordering is -important, an explicit memory barrier must be used. This is true of -many recent processors which implement a policy of ``relaxed,'' -``weak,'' or ``release'' memory consistency, such as Alpha, PowerPC, -and ia64. The default is @code{false}. -@end deftypevr - @deftypefn {Target Hook} {const char *} TARGET_INVALID_ARG_FOR_UNPROTOTYPED_FN (const_tree @var{typelist}, const_tree @var{funcdecl}, const_tree @var{val}) If defined, this macro returns the diagnostic message when it is illegal to pass argument @var{val} to function @var{funcdecl} diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in index 35b02b7..93fb41c 100644 --- a/gcc/doc/tm.texi.in +++ b/gcc/doc/tm.texi.in @@ -8143,8 +8143,6 @@ routine for target specific customizations of the system printf and scanf formatter settings. @end defmac -@hook TARGET_RELAXED_ORDERING - @hook TARGET_INVALID_ARG_FOR_UNPROTOTYPED_FN @hook TARGET_INVALID_CONVERSION |