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| author | Sergey Shalnov <Sergey.Shalnov@intel.com> | 2017-09-22 07:13:33 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2017-09-22 07:13:33 +0200 |
| commit | e7ba6a6041df85d7027a4e776f144a2f21204fdf (patch) | |
| tree | 814e5681975dccea8bed77d42686f8244713f3bd /gcc/doc | |
| parent | b9327b5ac225ed9cae6becd10b6588733e87adca (diff) | |
| download | gcc-e7ba6a6041df85d7027a4e776f144a2f21204fdf.zip gcc-e7ba6a6041df85d7027a4e776f144a2f21204fdf.tar.gz gcc-e7ba6a6041df85d7027a4e776f144a2f21204fdf.tar.bz2 | |
sse.md ("mov<mode>_internal"): Use <sseinsnmode> mode attribute for TARGET_AVX512VL.
/gcc
* config/i386/sse.md ("mov<mode>_internal"): Use <sseinsnmode>
mode attribute for TARGET_AVX512VL.
* config/i386/i386.opt (mprefer-avx256): New option.
* config/i386/i386.c (ix86_target_string): Add -mprefer-avx256
to flag_opts.
(ix86_preferred_simd_mode): Return 256-bit AVX modes
for TARGET_PREFER_AVX256.
* doc/invoke.texi (x86 Options): Document -mprefer-avx256.
/testsuite
* gcc.target/i386/avx512f-constant-set.c: New test.
* g++.dg/ext/pr57362.C: Test __attribute__((target("prefer-avx256"))).
* gcc.target/i386/avx512f-prefer.c: New test.
From-SVN: r253089
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/invoke.texi | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index db843ed..5e39c0e 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1194,7 +1194,7 @@ See RS/6000 and PowerPC Options. -mincoming-stack-boundary=@var{num} @gol -mcld -mcx16 -msahf -mmovbe -mcrc32 @gol -mrecip -mrecip=@var{opt} @gol --mvzeroupper -mprefer-avx128 @gol +-mvzeroupper -mprefer-avx128 -mprefer-avx256 @gol -mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol -mavx2 -mavx512f -mavx512pf -mavx512er -mavx512cd -mavx512vl @gol -mavx512bw -mavx512dq -mavx512ifma -mavx512vbmi -msha -maes @gol @@ -25858,6 +25858,11 @@ intrinsics. This option instructs GCC to use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer. +@item -mprefer-avx256 +@opindex mprefer-avx256 +This option instructs GCC to use 256-bit AVX instructions instead of +512-bit AVX instructions in the auto-vectorizer. + @item -mcx16 @opindex mcx16 This option enables GCC to generate @code{CMPXCHG16B} instructions in 64-bit |