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| author | Victor Do Nascimento <victor.donascimento@arm.com> | 2024-03-05 20:38:26 +0000 |
|---|---|---|
| committer | Victor Do Nascimento <victor.donascimento@arm.com> | 2024-03-27 10:19:30 +0000 |
| commit | d9ea5181800fee3c0c21c33a463d8ca90b004ff6 (patch) | |
| tree | 7c71af6ddade2c6038db4e982e5704290d0f52f1 /gcc/doc | |
| parent | 291c46a3f0d0355680f94280e955f4faf1cae6f9 (diff) | |
| download | gcc-d9ea5181800fee3c0c21c33a463d8ca90b004ff6.zip gcc-d9ea5181800fee3c0c21c33a463d8ca90b004ff6.tar.gz gcc-d9ea5181800fee3c0c21c33a463d8ca90b004ff6.tar.bz2 | |
aarch64: Add +lse128 architectural extension command-line flag
Given how, at present, the choice of using LSE128 atomic instructions
by the toolchain is delegated to run-time selection in the form of
Libatomic ifuncs, responsible for querying target support, the
`+lse128' target architecture compile-time flag is absent from GCC.
This, however, contrasts with the Binutils implementation, which gates
LSE128 instructions behind the `+lse128' flag. This can lead to
problems in GCC for certain use-cases. One such example is in the use
of inline assembly, whereby the inability of enabling the feature in
the command-line prevents the compiler from automatically issuing the
necessary LSE128 `.arch' directive.
This patch therefore brings GCC into alignment with LLVM and Binutils
in adding support for the `+lse128' architectural extension flag.
gcc/ChangeLog:
* config/aarch64/aarch64-option-extensions.def: Add LSE128
AARCH64_OPT_EXTENSION, adding it as a dependency for the D128
feature.
* doc/invoke.texi (AArch64 Options): Document +lse128.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/lse128-flag.c: New.
* gcc.target/aarch64/cpunative/info_23: Likewise.
* gcc.target/aarch64/cpunative/native_cpu_23.c: Likewise.
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/invoke.texi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index d09074e..f6c8d6f 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -21578,8 +21578,12 @@ Enable the FEAT_SME_I16I64 extension to SME. Enable the FEAT_SME_F64F64 extension to SME. +@item sme2 Enable the Scalable Matrix Extension 2. This also enables SME instructions. +@item lse128 +Enable the LSE128 128-bit atomic instructions extension. This also +enables LSE instructions. @item d128 Enable support for 128-bit system register read/write instructions. +This also enables the LSE128 extension. @item gcs Enable support for Armv9.4-a Guarded Control Stack extension. @item the |