* Add TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV target macro.

From-SVN: r218886

2 files changed, 12 insertions, 0 deletions

diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index ee741a9..50e80f6 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -2847,6 +2847,16 @@ A target hook which returns true if we need register usage leveling.  That means
 A target hook which returns true if an address with the same structure  can have different maximal legitimate displacement.  For example, the  displacement can depend on memory mode or on operand combinations in  the insn.    The default version of this target hook returns always false.
 @end deftypefn
 
+@deftypefn {Target Hook} bool TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P (rtx @var{subst})
+A target hook which returns @code{true} if @var{subst} can't
+substitute safely pseudos with equivalent memory values during
+register allocation.
+The default version of this target hook returns @code{false}.
+On most machines, this default should be used.  For generally
+machines with non orthogonal register usage for addressing, such
+as SH, this hook can be used to avoid excessive spilling.
+@end deftypefn
+
 @deftypefn {Target Hook} reg_class_t TARGET_SPILL_CLASS (reg_class_t, @var{machine_mode})
 This hook defines a class of registers which could be used for spilling  pseudos of the given mode and class, or @code{NO_REGS} if only memory  should be used.  Not defining this hook is equivalent to returning  @code{NO_REGS} for all inputs.
 @end deftypefn
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index 8f86538..a99cc72 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -2481,6 +2481,8 @@ as below:
 
 @hook TARGET_DIFFERENT_ADDR_DISPLACEMENT_P
 
+@hook TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P
+
 @hook TARGET_SPILL_CLASS
 
 @hook TARGET_CSTORE_MODE