diff options
| author | H.J. Lu <hongjiu.lu@intel.com> | 2011-07-13 11:39:40 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl@gcc.gnu.org> | 2011-07-13 04:39:40 -0700 |
| commit | cb77b6cf1f6f16014d71213cba699d76c87ac2ef (patch) | |
| tree | 60ff34b7d6fa1f782d25101324a23624f4b5b50b /gcc/doc | |
| parent | 36fc37994d59371be0bfa678011233a4bc3d3dd3 (diff) | |
| download | gcc-cb77b6cf1f6f16014d71213cba699d76c87ac2ef.zip gcc-cb77b6cf1f6f16014d71213cba699d76c87ac2ef.tar.gz gcc-cb77b6cf1f6f16014d71213cba699d76c87ac2ef.tar.bz2 | |
Remove -mfused-madd and add -mfma.
2011-07-13 H.J. Lu <hongjiu.lu@intel.com>
* doc/invoke.texi (x86): Remove -mfused-madd and add -mfma.
From-SVN: r176230
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/invoke.texi | 17 |
1 files changed, 6 insertions, 11 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index f146cc5..3429b31 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -600,7 +600,7 @@ Objective-C and Objective-C++ Dialects}. -mincoming-stack-boundary=@var{num} @gol -mcld -mcx16 -msahf -mmovbe -mcrc32 -mrecip -mvzeroupper @gol -mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol --maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfused-madd @gol +-maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfma @gol -msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlwp @gol -mthreads -mno-align-stringops -minline-all-stringops @gol -minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol @@ -12587,6 +12587,8 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. @itemx -mno-rdrnd @itemx -mf16c @itemx -mno-f16c +@itemx -mfma +@itemx -mno-fma @itemx -msse4a @itemx -mno-sse4a @itemx -mfma4 @@ -12612,9 +12614,9 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. @opindex mno-sse @opindex m3dnow @opindex mno-3dnow -These switches enable or disable the use of instructions in the MMX, -SSE, SSE2, SSE3, SSSE3, SSE4.1, AVX, AES, PCLMUL, FSGSBASE, RDRND, -F16C, SSE4A, FMA4, XOP, LWP, ABM, BMI, or 3DNow!@: extended instruction sets. +These switches enable or disable the use of instructions in the MMX, SSE, +SSE2, SSE3, SSSE3, SSE4.1, AVX, AES, PCLMUL, FSGSBASE, RDRND, F16C, FMA, +SSE4A, FMA4, XOP, LWP, ABM, BMI, or 3DNow!@: extended instruction sets. These extensions are also available as built-in functions: see @ref{X86 Built-in Functions}, for details of the functions enabled and disabled by these switches. @@ -12633,13 +12635,6 @@ supported architecture, using the appropriate flags. In particular, the file containing the CPU detection code should be compiled without these options. -@item -mfused-madd -@itemx -mno-fused-madd -@opindex mfused-madd -@opindex mno-fused-madd -Do (don't) generate code that uses the fused multiply/add or multiply/subtract -instructions. The default is to use these instructions. - @item -mcld @opindex mcld This option instructs GCC to emit a @code{cld} instruction in the prologue |