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author | Segher Boessenkool <segher@kernel.crashing.org> | 2019-05-22 00:05:25 +0200 |
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committer | Segher Boessenkool <segher@gcc.gnu.org> | 2019-05-22 00:05:25 +0200 |
commit | c6dd76fab44e5786ba6af573439e7c68440904f2 (patch) | |
tree | 7a931118de97ad1d16e8ec9d82cbe647febf63da /gcc/doc | |
parent | 818502a3c4446012cafe7b9d17a31d1286e9684a (diff) | |
download | gcc-c6dd76fab44e5786ba6af573439e7c68440904f2.zip gcc-c6dd76fab44e5786ba6af573439e7c68440904f2.tar.gz gcc-c6dd76fab44e5786ba6af573439e7c68440904f2.tar.bz2 |
rs6000: wk -> ws+p8v
* config/rs6000/constraints.md (define_register_constraint "wk"):
Delete.
* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
RS6000_CONSTRAINT_wk.
* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
(rs6000_init_hard_regno_mode_ok): Adjust.
* config/rs6000/rs6000.md: Replace "wk" constraint by "ws" with "p8v".
* doc/md.texi (Machine Constraints): Adjust.
From-SVN: r271485
Diffstat (limited to 'gcc/doc')
-rw-r--r-- | gcc/doc/md.texi | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 55de2f1..13a621d 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -3197,7 +3197,7 @@ Altivec vector register Any VSX register if the @option{-mvsx} option was used or NO_REGS. When using any of the register constraints (@code{wa}, @code{wd}, -@code{wf}, @code{wg}, @code{wi}, @code{wk}, +@code{wf}, @code{wg}, @code{wi}, @code{wl}, @code{wm}, @code{wp}, @code{wq}, @code{ws}, @code{wt}, @code{wv}, or @code{ww}) that take VSX registers, you must use @code{%x<n>} in the template so @@ -3262,9 +3262,6 @@ If @option{-mmfpgpr} was used, a floating point register or NO_REGS. @item wi FP or VSX register to hold 64-bit integers for VSX insns or NO_REGS. -@item wk -FP or VSX register to hold 64-bit doubles for direct moves or NO_REGS. - @item wl Floating point register if the LFIWAX instruction is enabled or NO_REGS. |