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| author | Carl Love <cel@us.ibm.com> | 2020-05-11 21:22:07 -0500 |
|---|---|---|
| committer | Bill Schmidt <wschmidt@linux.ibm.com> | 2020-05-11 21:22:07 -0500 |
| commit | b8eaa7545b643a418aa44054b8f2d79a2b3c6ef2 (patch) | |
| tree | 5e08d7cdae0ef533b9fa0adb968c0baf4a728f22 /gcc/doc | |
| parent | 5ca575182338a2670f3e7d636c48a2e2ef2d32dc (diff) | |
| download | gcc-b8eaa7545b643a418aa44054b8f2d79a2b3c6ef2.zip gcc-b8eaa7545b643a418aa44054b8f2d79a2b3c6ef2.tar.gz gcc-b8eaa7545b643a418aa44054b8f2d79a2b3c6ef2.tar.bz2 | |
rs6000: Add xxgenpcvwm and xxgenpcvdm
Add support for xxgenpcv[dw]m, along with individual and overloaded
built-in functions for access.
[gcc]
2020-05-11 Carl Love <cel@us.ibm.com>
* config/rs6000/altivec.h (vec_genpcvm): New #define.
* config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
instantiation.
(XXGENPCVM_V8HI): Likewise.
(XXGENPCVM_V4SI): Likewise.
(XXGENPCVM_V2DI): Likewise.
(XXGENPCVM): New overloaded built-in instantiation.
* config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
(altivec_expand_builtin): Add special handling for
FUTURE_BUILTIN_VEC_XXGENPCVM.
(builtin_function_type): Add handling for
FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
* config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
(UNSPEC_XXGENPCV): New constant.
(xxgenpcvm_<mode>_internal): New insn.
(xxgenpcvm_<mode>): New expansion.
* doc/extend.texi: Add documentation for vec_genpcvm built-ins.
[gcc/testsuite]
2020-05-11 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/xxgenpc-runnable.c: New.
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/extend.texi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index e35db43..c352c51 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -20889,6 +20889,18 @@ little-endian targets. Choose this built-in to check for presence of zero element if the same argument is also passed to @code{vec_strir}. @findex vec_strir_p +@smallexample +@exdent vector unsigned char vec_genpcvm (vector unsigned char, const int) +@exdent vector unsigned short vec_genpcvm (vector unsigned short, const int) +@exdent vector unsigned int vec_genpcvm (vector unsigned int, const int) +@exdent vector unsigned int vec_genpcvm (vector unsigned long long int, + const int) +@end smallexample +Generate PCV from specified Mask size, as if implemented by the Future +@code{xxgenpcvbm}, @code{xxgenpcvhm}, @code{xxgenpcvwm} instructions, where +immediate value is either 0, 1, 2 or 3. +@findex vec_genpcvm + @node PowerPC Hardware Transactional Memory Built-in Functions @subsection PowerPC Hardware Transactional Memory Built-in Functions GCC provides two interfaces for accessing the Hardware Transactional |