diff options
author | Adam Nemet <anemet@caviumnetworks.com> | 2009-09-19 20:23:55 +0000 |
---|---|---|
committer | Adam Nemet <nemet@gcc.gnu.org> | 2009-09-19 20:23:55 +0000 |
commit | b53da24424c79a824fa74ec3160efe0bbe9627eb (patch) | |
tree | b83b530090d1d703cf6e9697e8b8bb94870ed94a /gcc/doc | |
parent | 4172245c93c6b19cf73fec9c119af87a9df63656 (diff) | |
download | gcc-b53da24424c79a824fa74ec3160efe0bbe9627eb.zip gcc-b53da24424c79a824fa74ec3160efe0bbe9627eb.tar.gz gcc-b53da24424c79a824fa74ec3160efe0bbe9627eb.tar.bz2 |
mips.opt (mrelax-pic-calls): New option.
* config/mips/mips.opt (mrelax-pic-calls): New option.
* config/mips/mips.c (mips_strip_unspec_address): Move it up in
the file.
(mips_unspec_call): Change "unspec_call" expander into this.
(mips_strip_unspec_call): New function.
(mips_got_load): Call mips_unspec_call instead of
gen_unspec_call<mode>.
(mips16_build_call_stub): Fix comment for fp_code. Adjust call to
MIPS_CALL.
(mips_cfg_in_reorg): New function.
(mips16_lay_out_constants): Use it to decide whether to call
CFG-aware insn splitting.
(r10k_insert_cache_barriers): Move CFG set-up code from here to
mips_reorg. Move DF set-up code from here ...
(mips_df_reorg): ... to here. Call r10k_insert_cache_barriers
from here.
(mips_reorg): Call mips_df_reorg instead of
r10k_insert_cache_barriers. Move CFG set-up code here from
r10k_insert_cache_barriers.
(mips_call_expr_from_insn): New function.
(mips_pic_call_symbol_from_set): Likewise.
(mips_find_pic_call_symbol): Likewise.
(mips_annotate_pic_call_expr): Likewise.
(mips_get_pic_call_symbol): Likewise.
(mips_annotate_pic_calls): Likewise.
(mips_override_options): Disable -mrelax-pic-calls unless PIC
calls are used.
(mips_set_mips16_mode): Disable -mrelax-pic-calls for MIPS16.
* config/mips/mips-protos.h (mips_get_pic_call_symbol): Declare it.
* config/mips/mips.h (MIPS_CALL): Use it to print the .reloc
directive.
* config/mips/mips.md (UNSPEC_CALL_ATTR): New unspec.
(unspec_call<mode>): Remove it.
(sibcall_internal, sibcall_value_internal,
sibcall_value_multiple_internal, call_internal, call_split,
call_value_internal, call_value_split,
call_value_multiple_internal, call_value_multiple_split): Pass
SIZE_OPNO to MIPS_CALL.
(call_internal_direct, call_direct_split,
call_value_internal_direct, call_value_direct_split): Pass -1 as
SIZE_OPNO to MIPS_CALL.
* configure.ac <mips*-*-*>: Add test for .reloc R_MIPS_JALR.
* configure: Regenerate.
* doc/invoke.texi (Option Summary): Add -mrelax-pic-calls
and -mno-relax-pic-calls.
(MIPS Options): Document -mrelax-pic-calls
and -mno-relax-pic-calls.
testsuite/
* gcc.target/mips/mips.exp: Add relax-pic-calls
under -mfoo/-mno-foo options.
(mips-dg-options): Make -mrelax-pic-calls imply -mno-plt, -mabicalls
and -mexplicit-relocs.
* gcc.target/mips/call-1.c: New test.
* gcc.target/mips/call-2.c: New test.
* gcc.target/mips/call-3.c: New test.
* gcc.target/mips/lazy-binding-1.c: Add MIPS-specific dg-options.
* gcc.dg/tree-ssa/loop-1.c: Likewise.
From-SVN: r151890
Diffstat (limited to 'gcc/doc')
-rw-r--r-- | gcc/doc/invoke.texi | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index ad8e51c..5a547e2 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -705,7 +705,8 @@ Objective-C and Objective-C++ Dialects}. -mflush-func=@var{func} -mno-flush-func @gol -mbranch-cost=@var{num} -mbranch-likely -mno-branch-likely @gol -mfp-exceptions -mno-fp-exceptions @gol --mvr4130-align -mno-vr4130-align -msynci -mno-synci} +-mvr4130-align -mno-vr4130-align -msynci -mno-synci @gol +-mrelax-pic-calls -mno-relax-pic-calls} @emph{MMIX Options} @gccoptlist{-mlibfuncs -mno-libfuncs -mepsilon -mno-epsilon -mabi=gnu @gol @@ -13906,6 +13907,20 @@ When compiling code for single processor systems, it is generally safe to use @code{synci}. However, on many multi-core (SMP) systems, it will not invalidate the instruction caches on all cores and may lead to undefined behavior. + +@item -mrelax-pic-calls +@itemx -mno-relax-pic-calls +@opindex mrelax-pic-calls +Try to turn PIC calls that are normally dispatched via register +@code{$25} into direct calls. This is only possible if the linker can +resolve the destination at link-time and if the destination is within +range for a direct call. + +@option{-mrelax-pic-calls} is the default if GCC was configured to use +an assembler and a linker that supports the @code{.reloc} assembly +directive and @code{-mexplicit-relocs} is in effect. With +@code{-mno-explicit-relocs}, this optimization can be performed by the +assembler and the linker alone without help from the compiler. @end table @node MMIX Options |