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authorHans-Peter Nilsson <hp@bitrange.com>2012-11-26 03:22:15 +0000
committerHans-Peter Nilsson <hp@gcc.gnu.org>2012-11-26 03:22:15 +0000
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re PR middle-end/55030 (gcc.c-torture/execute/builtins/memcpy-chk.c execution, -Os (et al))
PR middle-end/55030 * builtins.c (expand_builtin_setjmp_receiver): Update comment regarding purpose of blockage. * emit-rtl.c [!HAVE_blockage] (gen_blockage): Similarly for the head comment. * rtlanal.c (volatile_insn_p): Ditto. * doc/md.texi (blockage): Update similarly. Change wording to require one of two forms, rather than implying a wider choice. * cse.c (cse_insn): Where checking for blocking insns, use volatile_insn_p instead of manual check for volatile ASM. * dse.c (scan_insn): Ditto. * cselib.c (cselib_process_insn): Ditto. From-SVN: r193802
Diffstat (limited to 'gcc/doc')
-rw-r--r--gcc/doc/md.texi5
1 files changed, 3 insertions, 2 deletions
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 482961b..4be4b55 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -5972,8 +5972,9 @@ the values of operands 1 and 2.
@item @samp{blockage}
This pattern defines a pseudo insn that prevents the instruction
-scheduler from moving instructions across the boundary defined by the
-blockage insn. Normally an UNSPEC_VOLATILE pattern.
+scheduler and other passes from moving instructions and using register
+equivalences across the boundary defined by the blockage insn.
+This needs to be an UNSPEC_VOLATILE pattern or a volatile ASM.
@cindex @code{memory_barrier} instruction pattern
@item @samp{memory_barrier}