diff options
| author | Mo, Zewei <zewei.mo@intel.com> | 2023-07-17 10:53:36 +0800 |
|---|---|---|
| committer | Haochen Jiang <haochen.jiang@intel.com> | 2023-07-17 11:24:16 +0800 |
| commit | a5088dc3f5ef73c8740f0b8be3e6ebf6b535f192 (patch) | |
| tree | f3547c630ad36d33aa46f6a1352694d085e2d9f1 /gcc/doc | |
| parent | 85c50b4a50af360026b807fca81ef65ba424bdb9 (diff) | |
| download | gcc-a5088dc3f5ef73c8740f0b8be3e6ebf6b535f192.zip gcc-a5088dc3f5ef73c8740f0b8be3e6ebf6b535f192.tar.gz gcc-a5088dc3f5ef73c8740f0b8be3e6ebf6b535f192.tar.bz2 | |
Initial Lunar Lake, Arrow Lake and Arrow Lake S Support
gcc/ChangeLog:
* common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
Arrow Lake and Arrow Lake S.
* common/config/i386/i386-common.cc:
(processor_name): Add arrowlake.
(processor_alias_table): Add arrow lake, arrow lake s and lunar
lake.
* common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
* config.gcc: Add -march=arrowlake and -march=arrowlake-s.
* config/i386/driver-i386.cc (host_detect_local_cpu): Handle
arrowlake-s.
* config/i386/i386-c.cc (ix86_target_macros_internal): Add
arrowlake.
* config/i386/i386-options.cc (m_ARROWLAKE): New.
(processor_cost_table): Add arrowlake.
* config/i386/i386.h (enum processor_type):
Add PROCESSOR_ARROWLAKE.
* config/i386/x86-tune.def: Add m_ARROWLAKE.
* doc/extend.texi: Add arrowlake and arrowlake-s.
* doc/invoke.texi: Ditto.
gcc/testsuite/ChangeLog:
* g++.target/i386/mv16.C: Add arrowlake and arrowlake-s.
* gcc.target/i386/funcspec-56.inc: Handle new march.
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/extend.texi | 6 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 17 |
2 files changed, 23 insertions, 0 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 5e20c83..093bd97 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -22269,6 +22269,12 @@ Intel Atom Sierra Forest CPU. @item grandridge Intel Atom Grand Ridge CPU. +@item arrowlake +Intel Core i7 Arrow Lake CPU. + +@item arrowlake-s +Intel Core i7 Arrow Lake S CPU. + @item knl Intel Knights Landing CPU. diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index dd28320..88e3c62 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -32578,6 +32578,23 @@ PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI, AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, ENQCMD, UINTR and RAOINT instruction set support. +@item arrowlake +Intel Arrow Lake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, +SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, +XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI, +MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, +PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI, +AVXIFMA, AVXVNNIINT8, AVXNECONVERT and CMPCCXADD instruction set support. + +@item arrowlake-s +Intel Arrow Lake S CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, +SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, +XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI, +MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, +PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI, +AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3 +and SM4 instruction set support. + @item knl Intel Knight's Landing CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, |