Add an "else" argument to IFN_COND_* functions

As suggested by Richard B, this patch changes the IFN_COND_*
functions so that they take the else value of the ?: operation
as a final argument, rather than always using argument 1.

All current callers will still use the equivalent of argument 1,
so this patch makes the SVE code assert that for now.  Later patches
add the general case.

2018-05-25  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* doc/md.texi: Update the documentation of the cond_* optabs
	to mention the new final operand.  Fix GET_MODE_NUNITS call.
	Describe the scalar case too.
	* internal-fn.def (IFN_EXTRACT_LAST): Change type to fold_left.
	* internal-fn.c (expand_cond_unary_optab_fn): Expect 3 operands
	instead of 2.
	(expand_cond_binary_optab_fn): Expect 4 operands instead of 3.
	(get_conditional_internal_fn): Update comment.
	* tree-vect-loop.c (vectorizable_reduction): Pass the original
	accumulator value as a final argument to conditional functions.
	* config/aarch64/aarch64-sve.md (cond_<optab><mode>): Turn into
	a define_expand and add an "else" operand.  Assert for now that
	the else operand is equal to operand 2.  Use SVE_INT_BINARY and
	SVE_COND_FP_BINARY instead of SVE_COND_INT_OP and SVE_COND_FP_OP.
	(*cond_<optab><mode>): New patterns.
	* config/aarch64/iterators.md (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX)
	(UNSPEC_COND_SMIN, UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
	(UNSPEC_COND_EOR): Delete.
	(optab): Remove associated mappings.
	(SVE_INT_BINARY): New code iterator.
	(sve_int_op): Remove int attribute and add "minus" to the code
	attribute.
	(SVE_COND_INT_OP): Delete.
	(SVE_COND_FP_OP): Rename to...
	(SVE_COND_FP_BINARY): ...this.

From-SVN: r260707

1 files changed, 16 insertions, 7 deletions

diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 30f1e09..ce46320 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -6349,13 +6349,21 @@ operand 0, otherwise (operand 2 + operand 3) is moved.
 @itemx @samp{cond_smax@var{mode}}
 @itemx @samp{cond_umin@var{mode}}
 @itemx @samp{cond_umax@var{mode}}
-Perform an elementwise operation on vector operands 2 and 3,
-under the control of the vector mask in operand 1, and store the result
-in operand 0.  This is equivalent to:
+When operand 1 is true, perform an operation on operands 2 and 3 and
+store the result in operand 0, otherwise store operand 4 in operand 0.
+The operation works elementwise if the operands are vectors.
+
+The scalar case is equivalent to:
+
+@smallexample
+op0 = op1 ? op2 @var{op} op3 : op4;
+@end smallexample
+
+while the vector case is equivalent to:
 
 @smallexample
-for (i = 0; i < GET_MODE_NUNITS (@var{n}); i++)
-  op0[i] = op1[i] ? op2[i] @var{op} op3[i] : op2[i];
+for (i = 0; i < GET_MODE_NUNITS (@var{m}); i++)
+  op0[i] = op1[i] ? op2[i] @var{op} op3[i] : op4[i];
 @end smallexample
 
 where, for example, @var{op} is @code{+} for @samp{cond_add@var{mode}}.
@@ -6364,8 +6372,9 @@ When defined for floating-point modes, the contents of @samp{op3[i]}
 are not interpreted if @var{op1[i]} is false, just like they would not
 be in a normal C @samp{?:} condition.
 
-Operands 0, 2 and 3 all have mode @var{m}, while operand 1 has the mode
-returned by @code{TARGET_VECTORIZE_GET_MASK_MODE}.
+Operands 0, 2, 3 and 4 all have mode @var{m}.  Operand 1 is a scalar
+integer if @var{m} is scalar, otherwise it has the mode returned by
+@code{TARGET_VECTORIZE_GET_MASK_MODE}.
 
 @cindex @code{neg@var{mode}cc} instruction pattern
 @item @samp{neg@var{mode}cc}