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authorKito Cheng <kito.cheng@gmail.com>2019-03-02 00:36:22 +0000
committerJim Wilson <wilson@gcc.gnu.org>2019-03-01 16:36:22 -0800
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RISC-V: Generalize -march support, add ELF attribute support.
Kito Cheng <kito.cheng@gmail.com> Monk Chiang <sh.chiang04@gmail.com> gcc/ * common/config/riscv/riscv-common.c: Include sstream. (riscv_subset_list::to_string): New. (riscv_arch_str): Likewise. * config.gcc (riscv*-*-*): Handle --with-riscv-attribute= * config.in: Regen. * config/riscv/riscv-protos.h (riscv_arch_str): New. * config/riscv/riscv.c (INCLUDE_STRING): Defined. (riscv_emit_attribute): New. (riscv_file_start): Emit attribute if needed. (riscv_option_override): Init riscv_emit_attribute_p. * config/riscv/riscv.opt (mriscv-attribute): New option. * configure.ac (riscv*-*-*): Check binutils is supporting ELF * configure: Regen. * doc/install.texi: Document --with-riscv-attribute. * doc/invoke.texi: Document -mriscv-attribute. * common/config/riscv/riscv-common.c: Include config/riscv/riscv-protos.h. (INCLUDE_STRING): Defined. (RISCV_DONT_CARE_VERSION): Defined. (riscv_subset_t): Declare. (riscv_subset_t::riscv_subset_t): New. (riscv_subset_list): Declare. (riscv_subset_list::riscv_subset_list): New. (riscv_subset_list::~riscv_subset_list): Likewise. (riscv_subset_list::parsing_subset_version): Likewise. (riscv_subset_list::parse_std_ext): Likewise. (riscv_subset_list::parse_sv_or_non_std_ext): Likewise. (riscv_subset_list::add): Likewise. (riscv_subset_list::lookup): Likewise. (riscv_subset_list::xlen): Likewise. (riscv_subset_list::parse): Likewise. (riscv_supported_std_ext): Likewise. (current_subset_list): Likewise. (riscv_parse_arch_string): Using riscv_subset_list::parse to parse. gcc/testsuite/ * gcc.target/riscv/attribute-1.c: New. * gcc.target/riscv/attribute-2.c: Likewise. * gcc.target/riscv/attribute-3.c: Likewise. * gcc.target/riscv/attribute-4.c: Likewise. * gcc.target/riscv/attribute-5.c: Likewise. * gcc.target/riscv/attribute-6.c: Likewise. * gcc.target/riscv/attribute-7.c: Likewise. * gcc.target/riscv/attribute-8.c: Likewise. * gcc.target/riscv/attribute-9.c: Likewise. * gcc.target/riscv/arch-1.c: New. * gcc.target/riscv/arch-2.c: Likewise. * gcc.target/riscv/arch-3.c: Likewise. * gcc.target/riscv/arch-4.c: Likewise. Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com> From-SVN: r269337
Diffstat (limited to 'gcc/doc')
-rw-r--r--gcc/doc/install.texi7
-rw-r--r--gcc/doc/invoke.texi7
2 files changed, 13 insertions, 1 deletions
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 1d925eb..8d7bee5 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -2161,6 +2161,13 @@ is used, it is enabled on Linux/x86 if target binutils
supports @code{Intel CET} instructions and disabled otherwise.
In this case the target libraries are configured to get additional
@option{-fcf-protection} option.
+
+@item --with-riscv-attribute=@samp{yes}, @samp{no} or @samp{default}
+Generate RISC-V attribute by default, in order to record extra build
+information in object.
+
+The option is disabled by default. It is enabled on RISC-V/ELF (bare-metal)
+target if target binutils supported.
@end table
@subheading Cross-Compiler-Specific Options
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index a8efa1a..df0883f 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1057,7 +1057,8 @@ See RS/6000 and PowerPC Options.
-mstrict-align -mno-strict-align @gol
-mcmodel=medlow -mcmodel=medany @gol
-mexplicit-relocs -mno-explicit-relocs @gol
--mrelax -mno-relax}
+-mrelax -mno-relax @gol
+-mriscv-attribute -mmo-riscv-attribute}
@emph{RL78 Options}
@gccoptlist{-msim -mmul=none -mmul=g13 -mmul=g14 -mallregs @gol
@@ -23825,6 +23826,10 @@ Take advantage of linker relaxations to reduce the number of instructions
required to materialize symbol addresses. The default is to take advantage of
linker relaxations.
+@item -memit-attribute
+@itemx -mno-emit-attribute
+Emit (do not emit) RISC-V attribute to record extra information into ELF
+objects. This feature requires at least binutils 2.32.
@end table
@node RL78 Options