Add BMI2 support.

gcc/

2011-08-23  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md (type): Add imulx, ishiftx and rotatex.
	(length_immediate): Handle imulx, ishiftx and rotatex.
	(imm_disp): Ditto.
	(isa): Add bmi2.
	(enabled): Handle bmi2.
	(w): New mode attribute.
	(*mul<mode><dwi>3): Split from *<u>mul<mode><dwi>3.
	(*umul<mode><dwi>3): Ditto.  Add imulx BMI2 alternative.
	(*bmi2_umulditi3_1): New insn pattern.
	(*bmi2_umulsidi3_1): Ditto.
	(*umul<mode><dwi>3 splitter): New splitter to avoid flags
	dependency.
	(*bmi2_ashl<mode>3_1): New insn pattern.
	(*ashl<mode>3_1): Add ishiftx BMI2 alternative.
	(*ashl<mode>3_1 splitter): New splitter to avoid flags
	dependency.
	(*bmi2_ashlsi3_1_zext): New insn pattern.
	(*ashlsi3_1_zext): Add ishiftx BMI2 alternative.
	(*ashlsi3_1_zext splitter): New splitter to avoid flags
	dependency.
	(*bmi2_<shiftrt_insn><mode>3_1): New insn pattern.
	(*<shiftrt_insn><mode>3_1): Add ishiftx BMI2 alternative.
	(*<shiftrt_insn><mode>3_1 splitter): New splitter to avoid
	flags dependency.
	(*bmi2_<shiftrt_insn>si3_1_zext): New insn pattern.
	(*<shiftrt_insn>si3_1_zext): Add ishiftx BMI2 alternative.
	(*<shiftrt_insn>si3_1_zext splitter): New splitter to avoid
	flags dependency.
	(*bmi2_rorx<mode>3_1): New insn pattern.
	(*<rotate_insn><mode>3_1): Add rotatex BMI2 alternative.
	(*rotate<mode>3_1 splitter): New splitter to avoid flags
	dependency.
	(*rotatert<mode>3_1 splitter): Ditto.
	(*bmi2_rorxsi3_1_zext): New insn pattern.
	(*<rotate_insn>si3_1_zext): Add rotatex BMI2 alternative.
	(*rotatesi3_1_zext splitter): New splitter to avoid flags
	dependency.
	(*rotatertsi3_1_zext splitter): Ditto.

2011-08-23  Kirill Yukhin  <kirill.yukhin@intel.com>

	* common/config/i386/i386-common.c (OPTION_MASK_ISA_BMI2_SET):
	New.
	(OPTION_MASK_ISA_BMI2_UNSET): Likewise.
	(ix86_handle_option): Handle OPT_mbmi2 case.
	* config.gcc (i[34567]86-*-*): Add bmi2intrin.h.
	(x86_64-*-*): Likewise.
	* config/i386/bmi2intrin.h: New file.
	* config/i386/cpuid.h (bit_BMI2): New.
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect
	BMI2 feature.
	* config/i386/i386-c.c (ix86_target_macros_internal):
	Conditionally define __BMI2__.
	* config/i386/i386.c (ix86_option_override_internal): Define PTA_BMI2.
	Handle BMI2 option.
	(ix86_valid_target_attribute_inner_p): Handle BMI2 option.
	(print_reg): New code.
	(ix86_print_operand): Likewise.
	(ix86_builtins): Add IX86_BUILTIN_BZHI32, IX86_BUILTIN_BZHI64,
	IX86_BUILTIN_PDEP32, IX86_BUILTIN_PDEP64, IX86_BUILTIN_PEXT32,
	IX86_BUILTIN_PEXT64.
	(bdesc_args): Add IX86_BUILTIN_BZHI32, IX86_BUILTIN_BZHI64,
	IX86_BUILTIN_PDEP32, IX86_BUILTIN_PDEP64, IX86_BUILTIN_PEXT32,
	IX86_BUILTIN_PEXT64.
	* config/i386/i386.h (TARGET_BMI2): New.
	* config/i386/i386.md (UNSPEC_PDEP): New.
	(UNSPEC_PEXT): Likewise.
	(*bmi2_bzhi_<mode>3): Likewise.
	(*bmi2_pdep_<mode>3): Likewise.
	(*bmi2_pext_<mode>3): Likewise.
	* config/i386/i386.opt (mbmi2): New.
	* config/i386/x86intrin.h: Include bmi2intrin.h when __BMI2__
	is defined.
	* doc/extend.texi: Document BMI2 built-in functions.
	* doc/invoke.texi: Document -mbmi2.

gcc/testsuite/

2011-08-23  Kirill Yukhin  <kirill.yukhin@intel.com>

	* g++.dg/other/i386-2.C: Add -mbmi2 check.
	* g++.dg/other/i386-3.C: Likewise.
	* gcc.target/i386/bmi2-bzhi32-1.c: New testcase.
	* gcc.target/i386/bmi2-bzhi32-1a.c: Likewise.
	* gcc.target/i386/bmi2-bzhi64-1.c: Likewise.
	* gcc.target/i386/bmi2-bzhi64-1a.c: Likewise.
	* gcc.target/i386/bmi2-mulx32-1.c: Likewise.
	* gcc.target/i386/bmi2-mulx32-1a.c: Likewise.
	* gcc.target/i386/bmi2-mulx64-1.c: Likewise.
	* gcc.target/i386/bmi2-mulx64-1a.c: Likewise.
	* gcc.target/i386/bmi2-pdep32-1.c: Likewise.
	* gcc.target/i386/bmi2-pdep32-1a.c: Likewise.
	* gcc.target/i386/bmi2-pdep64-1.c: Likewise.
	* gcc.target/i386/bmi2-pdep64-1a.c: Likewise.
	* gcc.target/i386/bmi2-pext32-1.c: Likewise.
	* gcc.target/i386/bmi2-pext32-1a.c: Likewise.
	* gcc.target/i386/bmi2-pext64-1.c: Likewise.
	* gcc.target/i386/bmi2-pext64-1a.c: Likewise.
	* gcc.target/i386/bmi2-rorx32-1.c: Likewise.
	* gcc.target/i386/bmi2-rorx32-1a.c: Likewise.
	* gcc.target/i386/bmi2-rorx64-1.c: Likewise.
	* gcc.target/i386/bmi2-rorx64-1a.c: Likewise.
	* gcc.target/i386/bmi2-sarx32-1.c: Likewise.
	* gcc.target/i386/bmi2-sarx32-1a.c: Likewise.
	* gcc.target/i386/bmi2-sarx64-1.c: Likewise.
	* gcc.target/i386/bmi2-sarx64-1a.c: Likewise.
	* gcc.target/i386/bmi2-shlx32-1.c: Likewise.
	* gcc.target/i386/bmi2-shlx32-1a.c: Likewise.
	* gcc.target/i386/bmi2-shlx64-1.c: Likewise.
	* gcc.target/i386/bmi2-shlx64-1a.c: Likewise.
	* gcc.target/i386/bmi2-shrx32-1.c: Likewise.
	* gcc.target/i386/bmi2-shrx32-1a.c: Likewise.
	* gcc.target/i386/bmi2-shrx64-1.c: Likewise.
	* gcc.target/i386/bmi2-shrx64-1a.c: Likewise.
	* gcc.target/i386/i386.exp (check_effective_target_bmi2): New.
	* gcc.target/i386/sse-12.c: Add BMI2.
	* gcc.target/i386/sse-13.c: Likewise.
	* gcc.target/i386/sse-14.c: Likewise.
	* gcc.target/i386/sse-22.c: Likewise.
	* gcc.target/i386/sse-23.c: Likewise.

From-SVN: r178001

2 files changed, 17 insertions, 3 deletions

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 29c02b8..0b36336 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -9883,6 +9883,17 @@ unsigned int __builtin_ia32_bextr_u32(unsigned int, unsigned int);
 unsigned long long __builtin_ia32_bextr_u64 (unsigned long long, unsigned long long);
 @end smallexample
 
+The following built-in functions are available when @option{-mbmi2} is used.
+All of them generate the machine instruction that is part of the name.
+@smallexample
+unsigned int _bzhi_u32 (unsigned int, unsigned int)
+unsigned int _pdep_u32 (unsigned int, unsigned int)
+unsigned int _pext_u32 (unsigned int, unsigned int)
+unsigned long long _bzhi_u64 (unsigned long long, unsigned long long)
+unsigned long long _pdep_u64 (unsigned long long, unsigned long long)
+unsigned long long _pext_u64 (unsigned long long, unsigned long long)
+@end smallexample
+
 The following built-in functions are available when @option{-mlzcnt} is used.
 All of them generate the machine instruction that is part of the name.
 @smallexample
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index fdc3297..cbf4276 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -607,7 +607,7 @@ Objective-C and Objective-C++ Dialects}.
 -mmmx  -msse  -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol
 -mavx2 -maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfma @gol
 -msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlzcnt @gol
--mlwp -mthreads  -mno-align-stringops  -minline-all-stringops @gol
+-mbmi2 -mlwp -mthreads  -mno-align-stringops  -minline-all-stringops @gol
 -minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol
 -mpush-args  -maccumulate-outgoing-args  -m128bit-long-double @gol
 -m96bit-long-double  -mregparm=@var{num}  -msseregparm @gol
@@ -12697,7 +12697,9 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
 @itemx -mabm
 @itemx -mno-abm
 @itemx -mbmi
+@itemx -mbmi2
 @itemx -mno-bmi
+@itemx -mno-bmi2
 @itemx -mlzcnt
 @itemx -mno-lzcnt
 @itemx -mtbm
@@ -12709,8 +12711,9 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
 @opindex m3dnow
 @opindex mno-3dnow
 These switches enable or disable the use of instructions in the MMX, SSE,
-SSE2, SSE3, SSSE3, SSE4.1, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, F16C, FMA,
-SSE4A, FMA4, XOP, LWP, ABM, BMI, LZCNT or 3DNow!@: extended instruction sets.
+SSE2, SSE3, SSSE3, SSE4.1, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, F16C,
+FMA, SSE4A, FMA4, XOP, LWP, ABM, BMI, BMI2, LZCNT or 3DNow!
+@: extended instruction sets.
 These extensions are also available as built-in functions: see
 @ref{X86 Built-in Functions}, for details of the functions enabled and
 disabled by these switches.