diff options
| author | Kirill Yukhin <kirill.yukhin@intel.com> | 2011-08-18 17:24:39 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl@gcc.gnu.org> | 2011-08-18 10:24:39 -0700 |
| commit | 7afac11005625275db3bbdb22a1bdd778871efae (patch) | |
| tree | b59f28405a8840d4ab39c3854797c53cc153f3e1 /gcc/doc | |
| parent | 6277a71071d0af461e0016cee626fa37c01f8e02 (diff) | |
| download | gcc-7afac11005625275db3bbdb22a1bdd778871efae.zip gcc-7afac11005625275db3bbdb22a1bdd778871efae.tar.gz gcc-7afac11005625275db3bbdb22a1bdd778871efae.tar.bz2 | |
Add -mavx2.
2011-08-18 Kirill Yukhin <kirill.yukhin@intel.com>
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX2_SET): New.
(OPTION_MASK_ISA_AVX_UNSET): Update.
(OPTION_MASK_ISA_AVX2_UNSET): New.
(ix86_handle_option): Handle OPT_mavx2 case.
* config/i386/cpuid.h (bit_AVX2): New.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
AVX2 feature.
* config/i386/i386-c.c (ix86_target_macros_internal):
Conditionally define __AVX2__.
* config/i386/i386.c (ix86_option_override_internal): Define
PTA_AVX2. Define "core-avx2" processor alias. Handle avx2
option.
(ix86_valid_target_attribute_inner_p): Handle avx2 option.
* config/i386/i386.h (TARGET_AVX2): New.
* config/i386/i386.opt (mavx2): New.
* doc/invoke.texi: Document -mavx2.
From-SVN: r177876
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/invoke.texi | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index f5d53d1..fdc3297 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -605,7 +605,7 @@ Objective-C and Objective-C++ Dialects}. -mincoming-stack-boundary=@var{num} @gol -mcld -mcx16 -msahf -mmovbe -mcrc32 -mrecip -mvzeroupper @gol -mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol --maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfma @gol +-mavx2 -maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfma @gol -msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlzcnt @gol -mlwp -mthreads -mno-align-stringops -minline-all-stringops @gol -minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol @@ -12666,6 +12666,8 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. @itemx -mno-sse4 @itemx -mavx @itemx -mno-avx +@itemx -mavx2 +@itemx -mno-avx2 @itemx -maes @itemx -mno-aes @itemx -mpclmul @@ -12707,7 +12709,7 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. @opindex m3dnow @opindex mno-3dnow These switches enable or disable the use of instructions in the MMX, SSE, -SSE2, SSE3, SSSE3, SSE4.1, AVX, AES, PCLMUL, FSGSBASE, RDRND, F16C, FMA, +SSE2, SSE3, SSSE3, SSE4.1, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, F16C, FMA, SSE4A, FMA4, XOP, LWP, ABM, BMI, LZCNT or 3DNow!@: extended instruction sets. These extensions are also available as built-in functions: see @ref{X86 Built-in Functions}, for details of the functions enabled and |