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| author | Michael Eager <eager@eagercon.com> | 2009-06-17 21:51:28 +0000 |
|---|---|---|
| committer | Michael Eager <eager@gcc.gnu.org> | 2009-06-17 21:51:28 +0000 |
| commit | 799dbb0f77a506ed18a17ac3765b29af9dd88055 (patch) | |
| tree | d7230e2a2b8120f546ed6ccf48cf9d0726dde762 /gcc/doc | |
| parent | 1469de3ce4519b53656ad8e40ef0ab4c7f2e6cee (diff) | |
| download | gcc-799dbb0f77a506ed18a17ac3765b29af9dd88055.zip gcc-799dbb0f77a506ed18a17ac3765b29af9dd88055.tar.gz gcc-799dbb0f77a506ed18a17ac3765b29af9dd88055.tar.bz2 | |
Create new constraint "d" for PowerPC FPRs with 64-bit values.
Replace uses of "f" constraint with "d" as needed.
From-SVN: r148630
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/md.texi | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 065529f..5c67900 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -1909,8 +1909,11 @@ Any constant whose absolute value is no greater than 4-bits. @item b Address base register +@item d +Floating point register (containing 64-bit value) + @item f -Floating point register +Floating point register (containing 32-bit value) @item v Vector register |