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authorRichard Sandiford <richard.sandiford@linaro.org>2017-09-25 12:57:49 +0000
committerRichard Sandiford <rsandifo@gcc.gnu.org>2017-09-25 12:57:49 +0000
commit579f368704e340c47957d5fb5aca6ecda6624a69 (patch)
tree98c3c05927d33eaae50459c94801c537ec7abec0 /gcc/doc
parent504e0b5f2c7128a89f869ca984949d063bab52c4 (diff)
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Update interface to TARGET_VECTORIZE_VEC_PERM_CONST_OK
This patch makes TARGET_VECTORIZE_VEC_PERM_CONST_OK take the permute vector in the form of a vec_perm_indices instead of an unsigned char *. It follows on from the recent patch that did the same in target-independent code. It was easy to make ARM and AArch64 use vec_perm_indices internally as well, and converting AArch64 helps with SVE. I did try doing the same for the other ports, but the surgery needed was much more invasive and much less obviously correct. 2017-09-22 Richard Sandiford <richard.sandifird@linaro.org> gcc/ * target.def (vec_perm_const_ok): Change sel parameter to vec_perm_indices. * optabs-query.c (can_vec_perm_p): Update accordingly. * doc/tm.texi: Regenerate. * config/aarch64/aarch64.c (expand_vec_perm_d): Change perm to auto_vec_perm_indices and remove separate nelt field. (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip) (aarch64_evpc_ext, aarch64_evpc_rev, aarch64_evpc_dup) (aarch64_evpc_tbl, aarch64_expand_vec_perm_const_1) (aarch64_expand_vec_perm_const): Update accordingly. (aarch64_vectorize_vec_perm_const_ok): Likewise. Change sel to vec_perm_indices. * config/arm/arm.c (expand_vec_perm_d): Change perm to auto_vec_perm_indices and remove separate nelt field. (arm_evpc_neon_vuzp, arm_evpc_neon_vzip, arm_evpc_neon_vrev) (arm_evpc_neon_vtrn, arm_evpc_neon_vext, arm_evpc_neon_vtbl) (arm_expand_vec_perm_const_1, arm_expand_vec_perm_const): Update accordingly. (arm_vectorize_vec_perm_const_ok): Likewise. Change sel to vec_perm_indices. * config/i386/i386.c (ix86_vectorize_vec_perm_const_ok): Change sel to vec_perm_indices. * config/ia64/ia64.c (ia64_vectorize_vec_perm_const_ok): Likewise. * config/mips/mips.c (mips_vectorize_vec_perm_const_ok): Likewise. * config/powerpcspe/powerpcspe.c (rs6000_vectorize_vec_perm_const_ok): Likewise. * config/rs6000/rs6000.c (rs6000_vectorize_vec_perm_const_ok): Likewise. From-SVN: r253148
Diffstat (limited to 'gcc/doc')
-rw-r--r--gcc/doc/tm.texi2
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 1f8c0f1..c2493cf 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -5774,7 +5774,7 @@ correct for most targets.
Return true if vector alignment is reachable (by peeling N iterations) for the given scalar type @var{type}. @var{is_packed} is false if the scalar access using @var{type} is known to be naturally aligned.
@end deftypefn
-@deftypefn {Target Hook} bool TARGET_VECTORIZE_VEC_PERM_CONST_OK (machine_mode, const unsigned char *@var{sel})
+@deftypefn {Target Hook} bool TARGET_VECTORIZE_VEC_PERM_CONST_OK (machine_mode, @var{vec_perm_indices})
Return true if a vector created for @code{vec_perm_const} is valid.
@end deftypefn