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author | Cesar Philippidis <cesar@codesourcery.com> | 2018-09-05 15:27:31 -0700 |
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committer | Cesar Philippidis <cesar@gcc.gnu.org> | 2018-09-05 15:27:31 -0700 |
commit | 53ceb8b542816b7b0a4175c1c2576104e1dc55ce (patch) | |
tree | 6abd01a2fd8382813052652c51a86a278a49c86e /gcc/doc | |
parent | 62c21ceea64291317650258921c34dea79b1e96b (diff) | |
download | gcc-53ceb8b542816b7b0a4175c1c2576104e1dc55ce.zip gcc-53ceb8b542816b7b0a4175c1c2576104e1dc55ce.tar.gz gcc-53ceb8b542816b7b0a4175c1c2576104e1dc55ce.tar.bz2 |
[nvptx] Basic -misa support for nvptx
gcc/
* config/nvptx/nvptx-opts.h: New file.
* config/nvptx/nvptx.c (nvptx_file_start): Print the correct .target.
* config/nvptx/nvptx.h: Include "nvptx-opts.h".
(ASM_SPEC): Define.
(TARGET_SM35): New macro.
* config/nvptx/nvptx.md (atomic_fetch_<logic><mode>): Enable with the
correct predicate.
* config/nvptx/nvptx.opt (ptx_isa, sm_30, sm_35): New enum and its
values.
(misa=): New option.
* doc/invoke.texi (Nvidia PTX Options): Document -misa.
gcc/testsuite/
* gcc.target/nvptx/atomic_fetch-1.c: New test.
* gcc.target/nvptx/atomic_fetch-1.c: New test.
Co-Authored-By: Bernd Schmidt <bernds_cb1@t-online.de>
From-SVN: r264133
Diffstat (limited to 'gcc/doc')
-rw-r--r-- | gcc/doc/invoke.texi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index ca92028..8ac29fd 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -22466,6 +22466,12 @@ These options are defined for Nvidia PTX: @opindex m64 Generate code for 32-bit or 64-bit ABI. +@item -misa=@var{ISA-string} +@opindex march +Generate code for given the specified PTX ISA (e.g.@ @samp{sm_35}). ISA +strings must be lower-case. Valid ISA strings include @samp{sm_30} and +@samp{sm_35}. The default ISA is sm_30. + @item -mmainkernel @opindex mmainkernel Link in code for a __main kernel. This is for stand-alone instead of |