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| author | Bernd Schmidt <bernd.schmidt@analog.com> | 2009-09-07 18:59:49 +0000 |
|---|---|---|
| committer | Bernd Schmidt <bernds@gcc.gnu.org> | 2009-09-07 18:59:49 +0000 |
| commit | 5254cd509fc4999185cc629e3cc7eda54db6132b (patch) | |
| tree | 49289032de5fa9dfaf699796265e8d3336d3fc25 /gcc/doc | |
| parent | 4dce27df21443fff7c99203a6a950be7be7beaf9 (diff) | |
| download | gcc-5254cd509fc4999185cc629e3cc7eda54db6132b.zip gcc-5254cd509fc4999185cc629e3cc7eda54db6132b.tar.gz gcc-5254cd509fc4999185cc629e3cc7eda54db6132b.tar.bz2 | |
gcc/
From Mike Frysinger <michael.frysinger@analog.com>
* config/bfin/bfin-protos.h (bfin_cpu_type): Add BFIN_CPU_BF542M,
BFIN_CPU_BF544M, BFIN_CPU_BF547M, BFIN_CPU_BF548M, and BFIN_CPU_BF549M.
* config/bfin/bfin.c (bfin_cpus[]): Add 0.3 for bf542m, bf544m, bf547m,
bf548m, and bf549m.
* config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define __ADSPBF542M__
for BFIN_CPU_BF542M, __ADSPBF544M__ for BFIN_CPU_BF544M, __ADSPBF547M__
for BFIN_CPU_BF547M, __ADSPBF548M__ for BFIN_CPU_BF548M, and
__ADSPBF549M__ for BFIN_CPU_BF549M.
* config/bfin/t-bfin-elf (MULTILIB_MATCHES): Select bf532-none for
bf542m-none, bf544m-none, bf547m-none, bf548m-none, and bf549m-none.
* config/bfin/t-bfin-linux (MULTILIB_MATCHES): Likewise.
* config/bfin/t-bfin-uclinux (MULTILIB_MATCHES): Likewise.
* doc/invoke.texi (Blackfin Options): Document that -mcpu now accepts
bf542m, bf544m, bf547m, bf548m, and bf549m.
gcc/testsuite/
From Mike Frysinger <michael.frysinger@analog.com>
* gcc.target/bfin/mcpu-bf542m.c: New file.
* gcc.target/bfin/mcpu-bf544m.c: Likewise.
* gcc.target/bfin/mcpu-bf546m.c: Likewise.
* gcc.target/bfin/mcpu-bf548m.c: Likewise.
* gcc.target/bfin/mcpu-bf549m.c: Likewise.
From-SVN: r151488
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/invoke.texi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index b630ce3..097468a 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -9698,6 +9698,7 @@ can be one of @samp{bf512}, @samp{bf514}, @samp{bf516}, @samp{bf518}, @samp{bf527}, @samp{bf531}, @samp{bf532}, @samp{bf533}, @samp{bf534}, @samp{bf536}, @samp{bf537}, @samp{bf538}, @samp{bf539}, @samp{bf542}, @samp{bf544}, @samp{bf547}, @samp{bf548}, @samp{bf549}, +@samp{bf542m}, @samp{bf544m}, @samp{bf547m}, @samp{bf548m}, @samp{bf549m}, @samp{bf561}. The optional @var{sirevision} specifies the silicon revision of the target Blackfin processor. Any workarounds available for the targeted silicon revision |