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authorLili Cui <lili.cui@intel.com>2023-07-04 07:59:59 +0000
committerCui, Lili <lili.cui@intel.com>2023-07-04 08:33:01 +0000
commit503643e808a20d19d1c7c6b264bca7d8f1959b97 (patch)
tree9a23a0aee1e80f663ee00aea9acbcdf31fc6fbff /gcc/doc
parent65ea0024063eaa9623c8309edbe22e042325b7ea (diff)
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x86: Enable ENQCMD and UINTR for march=sierraforest.
Enable ENQCMD and UINTR for march=sierraforest according to Intel ISE https://cdrdv2.intel.com/v1/dl/getContent/671368 gcc/ChangeLog * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST. * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
Diffstat (limited to 'gcc/doc')
-rw-r--r--gcc/doc/invoke.texi7
1 files changed, 4 insertions, 3 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index ed51ad5..594b24d 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -32566,7 +32566,8 @@ SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC,
XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI,
MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT,
PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI,
-AVXIFMA, AVXVNNIINT8, AVXNECONVERT and CMPCCXADD instruction set support.
+AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, ENQCMD and UINTR instruction set
+support.
@item grandridge
Intel Grand Ridge CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,
@@ -32574,8 +32575,8 @@ SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC,
XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI,
MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT,
PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI,
-AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD and RAOINT instruction set
-support.
+AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, ENQCMD, UINTR and RAOINT
+instruction set support.
@item knl
Intel Knight's Landing CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,