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| author | Aldy Hernandez <aldyh@redhat.com> | 2004-10-21 22:28:29 +0000 |
|---|---|---|
| committer | Aldy Hernandez <aldyh@gcc.gnu.org> | 2004-10-21 22:28:29 +0000 |
| commit | 4d4cbc0e72d3af8cbb8fc848a8aeb926b3104d27 (patch) | |
| tree | 3b8f1b01f11e5cca14d59ffac221b3e86cf38e0d /gcc/doc | |
| parent | cbf52bfab354f91e60cebcf3665a2efc88690fbe (diff) | |
| download | gcc-4d4cbc0e72d3af8cbb8fc848a8aeb926b3104d27.zip gcc-4d4cbc0e72d3af8cbb8fc848a8aeb926b3104d27.tar.gz gcc-4d4cbc0e72d3af8cbb8fc848a8aeb926b3104d27.tar.bz2 | |
config.gcc: Add support for --enable-e500_double.
* config.gcc: Add support for --enable-e500_double.
* config/rs6000/e500-double.h: New file.
* config/rs6000/rs6000.h: Define TARGET_E500_SINGLE and
TARGET_E500_DOUBLE.
* config/rs6000/eabi.h: Define TARGET_E500_SINGLE and
TARGET_E500_DOUBLE.
* config/rs6000/linuxspe.h: Same.
* doc/invoke.texi (Option Summary): Document new options for
mfloat-gprs.
(RS/6000 and PowerPC Options): Same.
* config/rs6000/rs6000.c (rs6000_parse_float_gprs_option): New
function.
(rs6000_override_options): Use it. Use
SUB3TARGET_OVERRIDE_OPTIONS.
Add 8548 to processor_target_table.
(rs6000_legitimate_address): Handle e500 doubles.
(rs6000_legitimize_address): Same.
(rs6000_legitimize_reload_address): Same.
(rs6000_hard_regno_nregs): Same.
(spe_func_has_64bit_regs_p): Same.
(emit_frame_save): Same.
(gen_frame_mem_offset): Same.
(rs6000_dwarf_register_span): Same.
(rs6000_generate_compare): Same.
(easy_fp_constant): Same.
(legitimate_offset_address_p): Same.
* config/rs6000/spe.md: (cmdfeq_gpr): New.
(tstdfeq_gpr): New.
(cmpdfgt_gpr): New.
(tstdfgt_gpr): New.
(tstdfgt_gpr): New.
(cmpdflt_gpr): New.
(tstdflt_gpr): New.
Add new constants.
From-SVN: r89416
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/invoke.texi | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 66e87a1..a2b0d83 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -616,7 +616,7 @@ See RS/6000 and PowerPC Options. -mabi=spe -mabi=no-spe @gol -misel=yes -misel=no @gol -mspe=yes -mspe=no @gol --mfloat-gprs=yes -mfloat-gprs=no @gol +-mfloat-gprs=yes -mfloat-gprs=no -mfloat-gprs=single -mfloat-gprs=double @gol -mprototype -mno-prototype @gol -msim -mmvme -mads -myellowknife -memb -msdata @gol -msdata=@var{opt} -mvxworks -mwindiss -G @var{num} -pthread} @@ -10279,12 +10279,23 @@ This switch enables or disables the generation of ISEL instructions. This switch enables or disables the generation of SPE simd instructions. -@item -mfloat-gprs=@var{yes/no} +@item -mfloat-gprs=@var{yes/single/double/no} @itemx -mfloat-gprs @opindex mfloat-gprs This switch enables or disables the generation of floating point operations on the general purpose registers for architectures that -support it. This option is currently only available on the MPC8540. +support it. + +The argument @var{yes} or @var{single} enables the use of +single-precision floating point operations. + +The argument @var{double} enables the use of single and +double-precision floating point operations. + +The argument @var{no} disables floating point operations on the +general purpose registers. + +This option is currently only available on the MPC854x. @item -m32 @itemx -m64 |