Improve cstore code generation on 64-bit sparc.

One major suboptimal area of the sparc back end is cstore generation
on 64-bit.

Due to the way arguments and return values of functions must be
promoted, the ideal mode for cstore's result would be DImode.

But this hasn't been done because of a fundamental limitation
of the cstore patterns.  They require a fixed mode be used for
the boolean result value.

I've decided to work around this by building a target hook which
specifies the type to use for conditional store results, and then I
use a special predicate for operans 0 in the cstore expanders so
that they still match even when we use DImode.

The default version of the target hook just does what it does now,
so no other target should be impacted by this at all.

Regstrapped on 32-bit sparc-linux-gnu and I've run the testsuite
with "-m64" to validate the 64-bit side.

gcc/

	* target.def (cstore_mode): New hook.
	* target.h: Include insn-codes.h
	* targhooks.c: Likewise.
	(default_cstore_mode): New function.
	* targhooks.h: Declare it.
	* doc/tm.texi.in: New hook slot for TARGET_CSTORE_MODE.
	* doc/tm.texi: Rebuild.
	* expmed.c (emit_cstore): Obtain cstore boolean result mode using
	target hook, rather than inspecting the insn_data.
	* config/sparc/sparc.c (sparc_cstore_mode): New function.
	(TARGET_CSTORE_MODE): Redefine.
	(emit_scc_insn): When TARGET_ARCH64, emit new 64-bit boolean
	result patterns.
	* config/sparc/predicates.md (cstore_result_operand): New special
	predicate.
	* config/sparc/sparc.md (cstoresi4, cstoredi4, cstore<F:mode>4):
	Use it for operand 0.
	(*seqsi_special): Rewrite using 'P' mode iterator on operand 0.
	(*snesi_special): Likewise.
	(*snesi_zero): Likewise.
	(*seqsi_zero): Likewise.
	(*sltu_insn): Likewise.
	(*sgeu_insn): Likewise.
	(*seqdi_special): Make operand 0 and comparison operation be of
	DImode.
	(*snedi_special): Likewise.
	(*snedi_special_vis3): Likewise.
	(*neg_snesi_zero): Rename to *neg_snesisi_zero.
	(*neg_snesi_sign_extend): Rename to *neg_snesidi_zero.
	(*snesi_zero_extend): Delete, covered by 'P' mode iterator.
	(*neg_seqsi_zero): Rename to *neg_seqsisi_zero.
	(*neg_seqsi_sign_extend): Rename to *neg_seqsidi_zero.
	(*seqsi_zero_extend): Delete, covered by 'P' mode iterator.
	(*sltu_extend_sp64): Likewise.
	(*neg_sltu_insn): Rename to *neg_sltusi_insn.
	(*neg_sltu_extend_sp64): Rename to *neg_sltudi_insn.
	(*sgeu_extend_sp64): Delete, covered by 'P' mode iterator.
	(*neg_sgeu_insn): Rename to *neg_sgeusi_insn.
	(*neg_sgeu_extend_sp64): Rename to *neg_sgeudi_insn.

gcc/testsuite/

	* gcc.target/sparc/setcc-4.c: New test.
	* gcc.target/sparc/setcc-5.c: New test.

From-SVN: r197679

2 files changed, 6 insertions, 0 deletions

diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 6395b4b..f6c59f9 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -2905,6 +2905,10 @@ A target hook which returns true if an address with the same structure  can have
 This hook defines a class of registers which could be used for spilling  pseudos of the given mode and class, or @code{NO_REGS} if only memory  should be used.  Not defining this hook is equivalent to returning  @code{NO_REGS} for all inputs.
 @end deftypefn
 
+@deftypefn {Target Hook} {enum machine_mode} TARGET_CSTORE_MODE (enum insn_code @var{icode})
+This hook defines the machine mode to use for the boolean result of  conditional store patterns.  The ICODE argument is the instruction code  for the cstore being performed.  Not definiting this hook is the same  as accepting the mode encoded into operand 0 of the cstore expander  patterns.
+@end deftypefn
+
 @node Old Constraints
 @section Obsolete Macros for Defining Constraints
 @cindex defining constraints, obsolete method
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index 91a756c..2d4b98a 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -2873,6 +2873,8 @@ as below:
 
 @hook TARGET_SPILL_CLASS
 
+@hook TARGET_CSTORE_MODE
+
 @node Old Constraints
 @section Obsolete Macros for Defining Constraints
 @cindex defining constraints, obsolete method