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author | Chris Demetriou <cgd@broadcom.com> | 2003-01-08 19:57:52 +0000 |
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committer | Chris Demetriou <cgd@gcc.gnu.org> | 2003-01-08 11:57:52 -0800 |
commit | 2d2a50c30a15483b59b9bba68c6117cc67896389 (patch) | |
tree | dc703be7bec33ccbef5d597bd4df45f98ae7b533 /gcc/doc | |
parent | 7ec3af37b976cec2b96de29eb9e39929f0bd4412 (diff) | |
download | gcc-2d2a50c30a15483b59b9bba68c6117cc67896389.zip gcc-2d2a50c30a15483b59b9bba68c6117cc67896389.tar.gz gcc-2d2a50c30a15483b59b9bba68c6117cc67896389.tar.bz2 |
config.gcc (mipsisa32r2-*-elf*, [...]): New targets, to support MIPS32 Release 2 (MIPS32R2) configurations.
2003-01-08 Chris Demetriou <cgd@broadcom.com>
* config.gcc (mipsisa32r2-*-elf*, mipsisa32r2el-*-elf*): New
targets, to support MIPS32 Release 2 (MIPS32R2) configurations.
* config/mips/mips.h (enum processor_type): Rename
PROCESSOR_R4KC to PROCESSOR_4KC, PROCESSOR_R5KC to
PROCESSOR_5KC, and PROCESSOR_R20KC to PROCESSOR_20KC.
Add PROCESSOR_M4K.
(TARGET_MIPS4KC, TARGET_MIPS5KC): Update for the renaming.
(ISA_MIPS32R2): New define.
(GENERATE_MULT3_SI, ISA_HAS_CONDMOVE, ISA_HAS_8CC)
(ISA_HAS_MADD_MSUB, ISA_HAS_CLZ_CLO)
(ISA_HAS_PREFETCH): Add support for MIPS32R2.
(MIPS_ISA_DEFAULT): Likewise. Also, fix indentation.
(TARGET_CPU_CPP_BUILTINS): Add support for MIPS32R2. Add new
predefine __mips_isa_rev for MIPS32, MIPS32R2, and MIPS64.
(ISA_HAS_ROTR_SI): Add support for MIPS32R2, and avoid if
compiling MIPS16 code.
(ISA_HAS_ROTR_DI): Do not use if compiling MIPS16 code, and fix
comment.
(ISA_HAS_SEB_SEH): New define.
(ASM_SPEC, LINK_SPEC): Pass -mips32r2 to assembler and linker.
* config/mips/mips.c (mips_cpu_info_table): Adjust for enum
processor_type value renaming. Add support for MIPS32R2.
Clean up comments, and move "sb1" entry with other MIPS64 CPU
entries.
(override_options): Reimplement -mipsN option handling so that
it will work correctly for -mips32r2. Avoid branch-likely
instructions on MIPS32R2.
* config/mips/mips.md (mulsi3_mult3): Add support for MIPS32R2.
(extendhisi2): Use extendhisi2_hw if ISA_HAS_SEB_SEH.
(extendqisi2): Use extendqisi2_hw if ISA_HAS_SEB_SEH.
(extendhisi2_hw, extendqisi2_hw): New.
* config/mips/netbsd.h (TARGET_CPU_CPP_BUILTINS): Add support
for MIPS32R2. Add new predefine __mips_isa_rev for MIPS32,
MIPS32R2, and MIPS64.
(LINK_SPEC): Pass -mips32r2 to linker.
* config/mips/t-isa3264: Built -mips32r2 multilibs.
* doc/invoke.texi (MIPS Options): Add -mips32r2, add support
for mips32r2 in the -march description. Alphabetically sort
CPU names in the -march description. Add long-missed -mips32
and -mips64 to MIPS option summary.
* config.gcc: Update copyright years to include 2003.
* config/mips/mips.c: Likewise.
* config/mips/mips.h: Likewise.
* config/mips/mips.md: Likewise.
* config/mips/netbsd.h: Likewise.
From-SVN: r61053
Diffstat (limited to 'gcc/doc')
-rw-r--r-- | gcc/doc/invoke.texi | 27 |
1 files changed, 19 insertions, 8 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index ab1e2da..2adb009 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -481,7 +481,8 @@ in the following sections. -membedded-pic -mfp32 -mfp64 -mfused-madd -mno-fused-madd @gol -mgas -mgp32 -mgp64 @gol -mgpopt -mhalf-pic -mhard-float -mint64 -mips1 @gol --mips2 -mips3 -mips4 -mlong64 -mlong32 -mlong-calls -mmemcpy @gol +-mips2 -mips3 -mips4 -mips32 -mips32r2 -mips64 @gol +-mlong64 -mlong32 -mlong-calls -mmemcpy @gol -mmips-as -mmips-tfile -mno-abicalls @gol -mno-embedded-data -mno-uninit-const-in-rodata @gol -mno-embedded-pic -mno-gpopt -mno-long-calls @gol @@ -7298,13 +7299,19 @@ These @samp{-m} options are defined for the MIPS family of computers: @item -march=@var{arch} @opindex march Generate code that will run on @var{arch}, which can be the name of a -generic MIPS ISA, or the name of a particular processor. The ISA names -are: @samp{mips1}, @samp{mips2}, @samp{mips3}, @samp{mips4}, @samp{mips32} -and @samp{mips64}. The processor names are: @samp{r2000}, -@samp{r3000}, @samp{r3900}, @samp{r4000}, @samp{vr4100}, @samp{vr4300}, -@samp{r4400}, @samp{r4600}, @samp{r4650}, @samp{vr5000}, @samp{r6000}, -@samp{r8000}, @samp{4kc}, @samp{4kp}, @samp{5kc}, @samp{20kc}, -@samp{orion}, and @samp{sb1}. The special value @samp{from-abi} selects the +generic MIPS ISA, or the name of a particular processor. +The ISA names are: +@samp{mips1}, @samp{mips2}, @samp{mips3}, @samp{mips4}, +@samp{mips32}, @samp{mips32r2}, and @samp{mips64}. +The processor names are: +@samp{4kc}, @samp{4kp}, @samp{5kc}, @samp{20kc}, +@samp{m4k}, +@samp{r2000}, @samp{r3000}, @samp{r3900}, @samp{r4000}, @samp{r4400}, +@samp{r4600}, @samp{r4650}, @samp{r6000}, @samp{r8000}, +@samp{orion}, +@samp{sb1}, +@samp{vr4100}, @samp{vr4300}, and @samp{vr5000}. +The special value @samp{from-abi} selects the most compatible architecture for the selected ABI (that is, @samp{mips1} for 32-bit ABIs and @samp{mips3} for 64-bit ABIs)@. @@ -7363,6 +7370,10 @@ Equivalent to @samp{-march=mips4}. @opindex mips32 Equivalent to @samp{-march=mips32}. +@item -mips32r2 +@opindex mips32r2 +Equivalent to @samp{-march=mips32r2}. + @item -mips64 @opindex mips64 Equivalent to @samp{-march=mips64}. |