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authorSegher Boessenkool <segher@kernel.crashing.org>2019-05-20 02:11:34 +0200
committerSegher Boessenkool <segher@gcc.gnu.org>2019-05-20 02:11:34 +0200
commit0c8ac746d1ccfaa429693c4869b08222e447ceed (patch)
treea5c3b8ae9d4288b01736ad222a79311a0323dd1f /gcc/doc
parentd17fbef89f753c171ab29c8a2c484fa2be8271b2 (diff)
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rs6000: Delete "wJ" and "wK" constraints
This replaces "wJ" by "wI", and "wK by "wH", both with isa "p9v". * config/rs6000/constraints.md (define_register_constraint "wJ"): Delete. (define_register_constraint "wK"): Delete. * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete RS6000_CONSTRAINT_wJ and RS6000_CONSTRAINT_wK. * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. (rs6000_init_hard_regno_mode_ok): Adjust. * config/rs6000/rs6000.md: Replace "wJ" constraint by "wI" with "p9v". Replace "wK" constraint by "wH" with "p9v". * config/rs6000/vsx.md: Ditto. * doc/md.texi (Machine Constraints): Adjust. From-SVN: r271387
Diffstat (limited to 'gcc/doc')
-rw-r--r--gcc/doc/md.texi6
1 files changed, 0 insertions, 6 deletions
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 1debcab..b96d24e 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -3337,12 +3337,6 @@ Altivec register if @option{-mvsx-small-integer}.
@item wI
Floating point register if @option{-mvsx-small-integer}.
-@item wJ
-FP register if @option{-mvsx-small-integer} and @option{-mpower9-vector}.
-
-@item wK
-Altivec register if @option{-mvsx-small-integer} and @option{-mpower9-vector}.
-
@item wL
Int constant that is the element number that the MFVSRLD instruction.
targets.