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author | Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | 2022-05-25 00:26:28 +0530 |
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committer | Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | 2022-05-25 00:42:00 +0530 |
commit | ae8decf1d2b8329af59592b4fa78ee8dfab3ba5e (patch) | |
tree | 276aaf3fc98f7ef3454430e574fc66affe4265b5 /gcc/doc/tm.texi | |
parent | 2f4f7de787e5844515d27b2269fc472f95a9916a (diff) | |
download | gcc-ae8decf1d2b8329af59592b4fa78ee8dfab3ba5e.zip gcc-ae8decf1d2b8329af59592b4fa78ee8dfab3ba5e.tar.gz gcc-ae8decf1d2b8329af59592b4fa78ee8dfab3ba5e.tar.bz2 |
Add new parameter to vec_perm_const hook for specifying operand mode.
The rationale of the patch is to support vec_perm_expr of the form:
lhs = vec_perm_expr<rhs, mask>
where lhs and rhs are vector types with different lengths but have
same element type. For example, lhs is SVE vector and rhs
is corresponding AdvSIMD vector.
It would also allow to express extract even/odd and interleave operations
with a VEC_PERM_EXPR. The interleave currently has the issue that we have
to artificially widen the inputs with "dont-care" elements.
gcc/ChangeLog:
* target.def (vec_perm_const): Define new parameter op_mode and
update doc.
* doc/tm.texi: Regenerate.
* config/aarch64/aarch64.cc (aarch64_vectorize_vec_perm_const): Adjust
vec_perm_const hook to add new parameter op_mode and return false
if result and operand modes do not match.
* config/arm/arm.cc (arm_vectorize_vec_perm_const): Likewise.
* config/gcn/gcn.cc (gcn_vectorize_vec_perm_const): Likewise.
* config/ia64/ia64.cc (ia64_vectorize_vec_perm_const): Likewise.
* config/mips/mips.cc (mips_vectorize_vec_perm_const): Likewise.
* config/rs6000/rs6000.cc (rs6000_vectorize_vec_perm_const): Likewise
* config/s390/s390.cc (s390_vectorize_vec_perm_const): Likewise.
* config/sparc/sparc.cc (sparc_vectorize_vec_perm_const): Likewise.
* config/i386/i386-expand.cc (ix86_vectorize_vec_perm_const): Likewise.
* config/i386/i386-expand.h (ix86_vectorize_vec_perm_const): Adjust
prototype.
* config/i386/sse.md (ashrv4di3): Adjust call to vec_perm_const hook.
(ashrv2di3): Likewise.
* optabs.cc (expand_vec_perm_const): Likewise.
* optabs-query.h (can_vec_perm_const_p): Adjust prototype.
* optabs-query.cc (can_vec_perm_const_p): Define new parameter
op_mode and pass it to vec_perm_const hook.
(can_mult_highpart_p): Adjust call to can_vec_perm_const_p.
* match.pd (vec_perm X Y CST): Likewise.
* tree-ssa-forwprop.cc (simplify_vector_constructor): Likewise.
* tree-vect-data-refs.cc (vect_grouped_store_supported): Likewise.
(vect_grouped_load_supported): Likewise.
(vect_shift_permute_load_chain): Likewise.
* tree-vect-generic.cc (lower_vec_perm): Likewise.
* tree-vect-loop-manip.cc (interleave_supported_p): Likewise.
* tree-vect-loop.cc (have_whole_vector_shift): Likewise.
* tree-vect-patterns.cc (vect_recog_rotate_pattern): Likewise.
* tree-vect-slp.cc (can_duplicate_and_interleave_p): Likewise.
(vect_transform_slp_perm_load): Likewise.
(vectorizable_slp_permutation): Likewise.
* tree-vect-stmts.cc (perm_mask_for_reverse): Likewise.
(vectorizable_bswap): Likewise.
(scan_store_can_perm_p): Likewise.
(vect_gen_perm_mask_checked): Likewise.
Diffstat (limited to 'gcc/doc/tm.texi')
-rw-r--r-- | gcc/doc/tm.texi | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index c5006af..b0ea398 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -6088,14 +6088,18 @@ for the given scalar type @var{type}. @var{is_packed} is false if the scalar access using @var{type} is known to be naturally aligned. @end deftypefn -@deftypefn {Target Hook} bool TARGET_VECTORIZE_VEC_PERM_CONST (machine_mode @var{mode}, rtx @var{output}, rtx @var{in0}, rtx @var{in1}, const vec_perm_indices @var{&sel}) +@deftypefn {Target Hook} bool TARGET_VECTORIZE_VEC_PERM_CONST (machine_mode @var{mode}, machine_mode @var{op_mode}, rtx @var{output}, rtx @var{in0}, rtx @var{in1}, const vec_perm_indices @var{&sel}) This hook is used to test whether the target can permute up to two -vectors of mode @var{mode} using the permutation vector @code{sel}, and -also to emit such a permutation. In the former case @var{in0}, @var{in1} -and @var{out} are all null. In the latter case @var{in0} and @var{in1} are -the source vectors and @var{out} is the destination vector; all three are -operands of mode @var{mode}. @var{in1} is the same as @var{in0} if -@var{sel} describes a permutation on one vector instead of two. +vectors of mode @var{op_mode} using the permutation vector @code{sel}, +producing a vector of mode @var{mode}. The hook is also used to emit such +a permutation. + +When the hook is being used to test whether the target supports a permutation, +@var{in0}, @var{in1}, and @var{out} are all null. When the hook is being used +to emit a permutation, @var{in0} and @var{in1} are the source vectors of mode +@var{op_mode} and @var{out} is the destination vector of mode @var{mode}. +@var{in1} is the same as @var{in0} if @var{sel} describes a permutation on one +vector instead of two. Return true if the operation is possible, emitting instructions for it if rtxes are provided. |