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authorHongyu Wang <hongyu.wang@intel.com>2023-07-14 16:33:32 +0800
committerHongyu Wang <hongyu.wang@intel.com>2023-10-07 16:34:29 +0800
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[APX EGPR] middle-end: Add index_reg_class with insn argument.
Like base_reg_class, INDEX_REG_CLASS also does not support backend insn. Add index_reg_class with insn argument for lra/reload usage. gcc/ChangeLog: * addresses.h (index_reg_class): New wrapper function like base_reg_class. * doc/tm.texi: Document INSN_INDEX_REG_CLASS. * doc/tm.texi.in: Ditto. * lra-constraints.cc (index_part_to_reg): Pass index_class. (process_address_1): Calls index_reg_class with curr_insn and replace INDEX_REG_CLASS with its return value index_cl. * reload.cc (find_reloads_address): Likewise. (find_reloads_address_1): Likewise. Co-authored-by: Kong Lingling <lingling.kong@intel.com> Co-authored-by: Hongtao Liu <hongtao.liu@intel.com>
Diffstat (limited to 'gcc/doc/tm.texi.in')
-rw-r--r--gcc/doc/tm.texi.in8
1 files changed, 8 insertions, 0 deletions
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index 265b94c..141027e 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -2166,6 +2166,14 @@ address where its value is either multiplied by a scale factor or
added to another register (as well as added to a displacement).
@end defmac
+@defmac INSN_INDEX_REG_CLASS (@var{insn})
+A C expression whose value is the register class to which a valid
+index register for a specified @var{insn} must belong. This macro is
+used when some backend insns may have limited usage of index register
+compared with other insns. If you defined this macro, the compiler
+will use it instead of @code{INDEX_REG_CLASS}.
+@end defmac
+
@defmac REGNO_OK_FOR_BASE_P (@var{num})
A C expression which is nonzero if register number @var{num} is
suitable for use as a base register in operand addresses.