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authorCraig Blackmore <craig.blackmore@embecosm.com>2020-05-12 14:41:08 -0700
committerJim Wilson <jimw@sifive.com>2020-05-12 14:43:48 -0700
commitde6320a81695800de0f0f5fc3e4c6487a52cd430 (patch)
treef6767022ffcd8a6baaca7656b0bccbf8fc6f5735 /gcc/doc/tm.texi.in
parent11dd3be56b83d11465ae5d6ecd0d8096531678e5 (diff)
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RISC-V: Add shorten_memrefs pass.
gcc/ * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv. * config/riscv/riscv-passes.def: New file. * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare. * config/riscv/riscv-shorten-memrefs.c: New file. * config/riscv/riscv.c (tree-pass.h): New include. (riscv_compressed_reg_p): New Function (riscv_compressed_lw_offset_p): Likewise. (riscv_compressed_lw_address_p): Likewise. (riscv_shorten_lw_offset): Likewise. (riscv_legitimize_address): Attempt to convert base + large_offset to compressible new_base + small_offset. (riscv_address_cost): Make anticipated compressed load/stores cheaper for code size than uncompressed load/stores. (riscv_register_priority): Move compressed register check to riscv_compressed_reg_p. * config/riscv/riscv.h (C_S_BITS): Define. (CSW_MAX_OFFSET): Define. * config/riscv/riscv.opt (mshorten-memefs): New option. * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule. (PASSES_EXTRA): Add riscv-passes.def. * doc/invoke.texi: Document -mshorten-memrefs. * config/riscv/riscv.c (riscv_new_address_profitable_p): New function. (TARGET_NEW_ADDRESS_PROFITABLE_P): Define. * doc/tm.texi: Regenerate. * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook. * sched-deps.c (attempt_change): Use old address if it is cheaper than new address. * target.def (new_address_profitable_p): New hook. * targhooks.c (default_new_address_profitable_p): New function. * targhooks.h (default_new_address_profitable_p): Declare. gcc/testsuite/ * gcc.target/riscv/shorten-memrefs-1.c: New test. * gcc.target/riscv/shorten-memrefs-2.c: New test. * gcc.target/riscv/shorten-memrefs-3.c: New test. * gcc.target/riscv/shorten-memrefs-4.c: New test. * gcc.target/riscv/shorten-memrefs-5.c: New test. * gcc.target/riscv/shorten-memrefs-6.c: New test. * gcc.target/riscv/shorten-memrefs-7.c: New test.
Diffstat (limited to 'gcc/doc/tm.texi.in')
-rw-r--r--gcc/doc/tm.texi.in2
1 files changed, 2 insertions, 0 deletions
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index e31cdb2..3be984b 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -4697,6 +4697,8 @@ Define this macro if a non-short-circuit operation produced by
@hook TARGET_NOCE_CONVERSION_PROFITABLE_P
+@hook TARGET_NEW_ADDRESS_PROFITABLE_P
+
@hook TARGET_NO_SPECULATION_IN_DELAY_SLOTS_P
@hook TARGET_ESTIMATED_POLY_VALUE