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authorMichael Meissner <meissner@linux.vnet.ibm.com>2009-07-30 20:48:17 +0000
committerMichael Meissner <meissner@gcc.gnu.org>2009-07-30 20:48:17 +0000
commit29e6733c20c98fe73c79ca9cac2dd758f3b3d67e (patch)
tree57363e9c9bcc2f879f86f63a88b7f0172e3f610d /gcc/doc/md.texi
parent1b3b24c2a6de2f8b4a0ce687e8f62d3eb1ee2b53 (diff)
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Add patch 5/6 for full power7/VSX support
Co-Authored-By: Pat Haugen <pthaugen@us.ibm.com> Co-Authored-By: Revital Eres <eres@il.ibm.com> From-SVN: r150271
Diffstat (limited to 'gcc/doc/md.texi')
-rw-r--r--gcc/doc/md.texi17
1 files changed, 16 insertions, 1 deletions
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index d9dca7a..0e516b0 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -1916,7 +1916,19 @@ Floating point register (containing 64-bit value)
Floating point register (containing 32-bit value)
@item v
-Vector register
+Altivec vector register
+
+@item wd
+VSX vector register to hold vector double data
+
+@item wf
+VSX vector register to hold vector float data
+
+@item ws
+VSX vector register to hold scalar float data
+
+@item wa
+Any VSX register
@item h
@samp{MQ}, @samp{CTR}, or @samp{LINK} register
@@ -2029,6 +2041,9 @@ AND masks that can be performed by two rldic@{l, r@} instructions
@item W
Vector constant that does not require memory
+@item j
+Vector constant that is all zeros.
+
@end table
@item Intel 386---@file{config/i386/constraints.md}