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authorVladimir Makarov <vmakarov@redhat.com>2011-11-23 18:51:17 +0000
committerVladimir Makarov <vmakarov@gcc.gnu.org>2011-11-23 18:51:17 +0000
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re PR rtl-optimization/48455 (Huge code size regression for all ARM configurations)
2011-11-23 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/48455 * doc/invoke.texi (-fira-region): Document default values. * flags-types.h (enum ira_region): Add new value IRA_REGION_AUTODETECT. * common.opt (fira-region): Set up initial value to IRA_REGION_AUTODETECT. * toplev.c (process_options): Set up flag_ira_region depending on -O options. * ira.c (ira.c): Remove optimize guard for ira_build. From-SVN: r181675
Diffstat (limited to 'gcc/doc/invoke.texi')
-rw-r--r--gcc/doc/invoke.texi17
1 files changed, 10 insertions, 7 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index e58ed1b..4e6edb9 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -6731,13 +6731,16 @@ rule generates a better code.
Use specified regions for the integrated register allocator. The
@var{region} argument should be one of @code{all}, @code{mixed}, or
@code{one}. The first value means using all loops as register
-allocation regions, the second value which is the default means using
-all loops except for loops with small register pressure as the
-regions, and third one means using all function as a single region.
-The first value can give best result for machines with small size and
-irregular register set, the third one results in faster and generates
-decent code and the smallest size code, and the default value usually
-give the best results in most cases and for most architectures.
+allocation regions, the second value which is enabled by default when
+compiling with optimization for speed (@option{-O}, @option{-O2},
+@dots{}) means using all loops except for loops with small register
+pressure as the regions, and third one which is enabled by default for
+@option{-Os} or @option{-O0} means using all function as a single
+region. The first value can give best result for machines with small
+size and irregular register set, the third one results in faster and
+generates decent code and the smallest size code, and the second value
+usually give the best results in most cases and for most
+architectures.
@item -fira-loop-pressure
@opindex fira-loop-pressure