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| author | Wilco Dijkstra <wdijkstr@arm.com> | 2016-11-14 12:07:03 +0000 |
|---|---|---|
| committer | Wilco Dijkstra <wilco@gcc.gnu.org> | 2016-11-14 12:07:03 +0000 |
| commit | f6b9a2a0c58a6f8b29f801fd1631c7eee5138c3a (patch) | |
| tree | 98019cdbfc5bf0bc0b95561471186e3aee3edc48 /gcc/doc/invoke.texi | |
| parent | 94f7a25eebd2599175e838f09afe7daf59c3e9c1 (diff) | |
| download | gcc-f6b9a2a0c58a6f8b29f801fd1631c7eee5138c3a.zip gcc-f6b9a2a0c58a6f8b29f801fd1631c7eee5138c3a.tar.gz gcc-f6b9a2a0c58a6f8b29f801fd1631c7eee5138c3a.tar.bz2 | |
The second patch updates the Cortex-A57 scheduler now that we can differentiate between shifts and bitfield inserts.
The second patch updates the Cortex-A57 scheduler now that we can differentiate
between shifts and bitfield inserts. The Cortex-A57 Software Optimization Guide
indicates that BFM operations use the integer multi-cycle pipeline, while ARM
UXTB/H instructions use the Integer 1 or Integer 0 pipelines, so swap the bfm
and extend reservations. This results in minor scheduling differences.
* config/arm/cortex-a57.md (cortex_a57_alu): Move extend here, bfm...
(cortex_a57_alu_shift): ...here.
From-SVN: r242385
Diffstat (limited to 'gcc/doc/invoke.texi')
0 files changed, 0 insertions, 0 deletions