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authorHaochen Jiang <haochen.jiang@intel.com>2023-05-31 10:45:00 +0800
committerHaochen Jiang <haochen.jiang@intel.com>2023-04-10 09:51:46 +0800
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parent14a864ae5d9e06236489a5629f4f76008630a9e6 (diff)
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Support Intel AMX-COMPLEX
gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_available_features): Detect AMX-COMPLEX. * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_COMPLEX_SET, OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New. (ix86_handle_option): Handle -mamx-complex. * common/config/i386/i386-cpuinfo.h (enum processor_features): Add FEATURE_AMX_COMPLEX. * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for amx-complex. * config.gcc: Add amxcomplexintrin.h. * config/i386/cpuid.h (bit_AMX_COMPLEX): New. * config/i386/i386-c.cc (ix86_target_macros_internal): Define __AMX_COMPLEX__. * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX). * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p): Handle amx-complex. * config/i386/i386.opt: Add option -mamx-complex. * config/i386/immintrin.h: Include amxcomplexintrin.h. * doc/extend.texi: Document amx-complex. * doc/invoke.texi: Document -mamx-complex. * doc/sourcebuild.texi: Document target amx-complex. * config/i386/amxcomplexintrin.h: New file. gcc/testsuite/ChangeLog: * g++.dg/other/i386-2.C: Add -mamx-complex. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/amx-check.h: Add cpu check for AMX-COMPLEX. * gcc.target/i386/amx-helper.h: Add amx-complex support. * gcc.target/i386/funcspec-56.inc: Add new target attribute. * gcc.target/i386/sse-12.c: Add -mamx-complex. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Add amx-complex. * gcc.target/i386/sse-23.c: Ditto. * lib/target-supports.exp (check_effective_target_amx_complex): New. * gcc.target/i386/amxcomplex-asmatt-1.c: New test. * gcc.target/i386/amxcomplex-asmintel-1.c: Ditto. * gcc.target/i386/amxcomplex-cmmimfp16ps-2.c: Ditto. * gcc.target/i386/amxcomplex-cmmrlfp16ps-2.c: Ditto.
Diffstat (limited to 'gcc/doc/invoke.texi')
-rw-r--r--gcc/doc/invoke.texi11
1 files changed, 7 insertions, 4 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index c948288..a38547f 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1429,7 +1429,7 @@ See RS/6000 and PowerPC Options.
-mrdseed -msgx -mavx512vp2intersect -mserialize -mtsxldtrk
-mamx-tile -mamx-int8 -mamx-bf16 -muintr -mhreset -mavxvnni
-mavx512fp16 -mavxifma -mavxvnniint8 -mavxneconvert -mcmpccxadd -mamx-fp16
--mprefetchi -mraoint
+-mprefetchi -mraoint -mamx-complex
-mcldemote -mms-bitfields -mno-align-stringops -minline-all-stringops
-minline-stringops-dynamically -mstringop-strategy=@var{alg}
-mkl -mwidekl
@@ -33337,6 +33337,9 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
@need 200
@opindex mraoint
@itemx -mraoint
+@need 200
+@opindex mamx-complex
+@itemx -mamx-complex
These switches enable the use of instructions in the MMX, SSE,
SSE2, SSE3, SSSE3, SSE4, SSE4A, SSE4.1, SSE4.2, AVX, AVX2, AVX512F, AVX512PF,
AVX512ER, AVX512CD, AVX512VL, AVX512BW, AVX512DQ, AVX512IFMA, AVX512VBMI, SHA,
@@ -33347,9 +33350,9 @@ XSAVEOPT, XSAVEC, XSAVES, RTM, HLE, TBM, MWAITX, CLZERO, PKU, AVX512VBMI2,
GFNI, VAES, WAITPKG, VPCLMULQDQ, AVX512BITALG, MOVDIRI, MOVDIR64B, AVX512BF16,
ENQCMD, AVX512VPOPCNTDQ, AVX5124FMAPS, AVX512VNNI, AVX5124VNNIW, SERIALIZE,
UINTR, HRESET, AMXTILE, AMXINT8, AMXBF16, KL, WIDEKL, AVXVNNI, AVX512-FP16,
-AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AMX-FP16, PREFETCHI, RAOINT or
-CLDEMOTE extended instruction sets. Each has a corresponding @option{-mno-}
-option to disable use of these instructions.
+AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AMX-FP16, PREFETCHI, RAOINT,
+AMX-COMPLEX or CLDEMOTE extended instruction sets. Each has a corresponding
+@option{-mno-} option to disable use of these instructions.
These extensions are also available as built-in functions: see
@ref{x86 Built-in Functions}, for details of the functions enabled and