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authorUros Bizjak <uros@gcc.gnu.org>2017-08-08 18:48:46 +0200
committerUros Bizjak <uros@gcc.gnu.org>2017-08-08 18:48:46 +0200
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parent7d27b70bd861d6b83a6821e3fb4205e19a365310 (diff)
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re PR target/81708 (The x86 stack canary location should be customizable)
PR target/81708 * config/i386/i386.opt (mstack-protector-guard-reg=): New option (mstack-protector-guard-offset=): Ditto. * config/i386/i386.c (ix86_option_override): Handle -mstack-protector-guard-reg= and -mstack-protector-guard-offset= options. (ix86_stack_protect_guard): Use ix86_stack_protect_guard_reg and ix86_stack_protect_guard_offset variables. (TARGET_STACK_PROTECT_GUARD): Always define. * doc/invoke.texi (x86 Options): Document -mstack-protector-guard-reg= and -mstack-protector-guard-offset= options. testsuite/ChangeLog: PR target/81708 * gcc.target/i386/stack-prot-guard.c: New test. From-SVN: r250965
Diffstat (limited to 'gcc/doc/invoke.texi')
-rw-r--r--gcc/doc/invoke.texi17
1 files changed, 15 insertions, 2 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index b77de03..cc0f5a0 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1215,7 +1215,9 @@ See RS/6000 and PowerPC Options.
-msse2avx -mfentry -mrecord-mcount -mnop-mcount -m8bit-idiv @gol
-mavx256-split-unaligned-load -mavx256-split-unaligned-store @gol
-malign-data=@var{type} -mstack-protector-guard=@var{guard} @gol
--mmitigate-rop -mgeneral-regs-only -mcall-ms2sysv-xlogues}
+-mstack-protector-guard-reg=@var{reg} @gol
+-mstack-protector-guard-offset=@var{offset} -mmitigate-rop @gol
+-mgeneral-regs-only -mcall-ms2sysv-xlogues}
@emph{x86 Windows Options}
@gccoptlist{-mconsole -mcygwin -mno-cygwin -mdll @gol
@@ -26147,12 +26149,23 @@ to 255, 8-bit unsigned integer divide is used instead of
Split 32-byte AVX unaligned load and store.
@item -mstack-protector-guard=@var{guard}
-@opindex mstack-protector-guard=@var{guard}
+@itemx -mstack-protector-guard-reg=@var{reg}
+@itemx -mstack-protector-guard-offset=@var{offset}
+@opindex mstack-protector-guard
+@opindex mstack-protector-guard-reg
+@opindex mstack-protector-guard-offset
Generate stack protection code using canary at @var{guard}. Supported
locations are @samp{global} for global canary or @samp{tls} for per-thread
canary in the TLS block (the default). This option has effect only when
@option{-fstack-protector} or @option{-fstack-protector-all} is specified.
+With the latter choice the options
+@option{-mstack-protector-guard-reg=@var{reg}} and
+@option{-mstack-protector-guard-offset=@var{offset}} furthermore specify
+which segment register (@code{%fs} or @code{%gs}) to use as base register
+for reading the canary, and from what offset from that base register.
+The default for those is as specified in the relevant ABI.
+
@item -mmitigate-rop
@opindex mmitigate-rop
Try to avoid generating code sequences that contain unintended return