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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2017-07-26 12:39:43 +0000 |
|---|---|---|
| committer | Sebastian Huber <sh@gcc.gnu.org> | 2017-07-26 12:39:43 +0000 |
| commit | 867ba4b9ff3dec775c82b7c32de5f3bf2b489586 (patch) | |
| tree | ed2a39d2eb4282c114a5687534239915a0235db8 /gcc/doc/invoke.texi | |
| parent | 404f48ac88c024c661ed40dba8ab0c4555ead2e7 (diff) | |
| download | gcc-867ba4b9ff3dec775c82b7c32de5f3bf2b489586.zip gcc-867ba4b9ff3dec775c82b7c32de5f3bf2b489586.tar.gz gcc-867ba4b9ff3dec775c82b7c32de5f3bf2b489586.tar.bz2 | |
[SPARC] Add -mfsmuld option
Add the -mfsmuld option to control the generation of the FsMULd
instruction. In general, this instruction is available in architecture
version V8 and V9 CPUs with FPU. Some CPUs of this category do not
support this instruction properly, e.g. AT697E, AT697F and UT699. Some
CPUs of this category do not implement it in hardware, e.g. LEON3/4 with
GRFPU-lite.
gcc/
* config/sparc/sparc.c (dump_target_flag_bits): Dump MASK_FSMULD.
(sparc_option_override): Honour MASK_FSMULD.
* config/sparc/sparc.h (MASK_FEATURES): Add MASK_FSMULD.
* config/sparc/sparc.md (muldf3_extend): Use TARGET_FSMULD.
* config/sparc/sparc.opt (mfsmuld): New option.
* doc/invoke.texi (mfsmuld): Document option.
From-SVN: r250570
Diffstat (limited to 'gcc/doc/invoke.texi')
| -rw-r--r-- | gcc/doc/invoke.texi | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index a6da37c..6e174c5 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1124,7 +1124,7 @@ See RS/6000 and PowerPC Options. -mv8plus -mno-v8plus -mvis -mno-vis @gol -mvis2 -mno-vis2 -mvis3 -mno-vis3 @gol -mvis4 -mno-vis4 -mvis4b -mno-vis4b @gol --mcbcond -mno-cbcond -mfmaf -mno-fmaf @gol +-mcbcond -mno-cbcond -mfmaf -mno-fmaf -mfsmuld -mno-fsmuld @gol -mpopc -mno-popc -msubxc -mno-subxc @gol -mfix-at697f -mfix-ut699 -mfix-ut700 -mfix-gr712rc @gol -mlra -mno-lra} @@ -24069,6 +24069,15 @@ Fused Multiply-Add Floating-point instructions. The default is @option{-mfmaf} when targeting a CPU that supports such instructions, such as Niagara-3 and later. +@item -mfsmuld +@itemx -mno-fsmuld +@opindex mfsmuld +@opindex mno-fsmuld +With @option{-mfsmuld}, GCC generates code that takes advantage of the +Floating-point Multiply Single to Double (FsMULd) instruction. The default is +@option{-mfsmuld} when targeting a CPU supporting the architecture versions V8 +or V9 with FPU except @option{-mcpu=leon}. + @item -mpopc @itemx -mno-popc @opindex mpopc |