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author | Prakhar Bahuguna <prakhar.bahuguna@arm.com> | 2017-05-04 10:26:25 +0000 |
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committer | Thomas Preud'homme <thopre01@gcc.gnu.org> | 2017-05-04 10:26:25 +0000 |
commit | 261ce1e56f828d0b18c9c0ca5dcd14452661f062 (patch) | |
tree | 9495abb72c031085227a8e4025311a32dce1ec5b /gcc/doc/invoke.texi | |
parent | 556cf0887e1583d109597e6e4abff2bad058abcf (diff) | |
download | gcc-261ce1e56f828d0b18c9c0ca5dcd14452661f062.zip gcc-261ce1e56f828d0b18c9c0ca5dcd14452661f062.tar.gz gcc-261ce1e56f828d0b18c9c0ca5dcd14452661f062.tar.bz2 |
[ARM] Enable Purecode for ARMv8-M Baseline
This patch adds support for purecode to ARMv8-M Baseline, in addition to
the existing support for ARMv7-M and ARMv8-M Mainline.
2017-05-04 Prakhar Bahuguna <prakhar.bahuguna@arm.com>
Andre Simoes Dias Vieira <andre.simoesdiasvieira@arm.com>
gcc/
* config/arm/arm.md (movsi): Change TARGET_32BIT to TARGET_HAVE_MOVT.
(movt splitter): Likewise.
* config/arm/arm.c (arm_option_check_internal): Change arm_arch_thumb2
to TARGET_HAVE_MOVT, and merge with -mslow-flash-data check.
(const_ok_for_arm): Change else to else if (TARGET_THUMB2) and add else
block for Thumb-1 with MOVT.
(thumb2_legitimate_address_p): Move code block ...
(can_avoid_literal_pool_for_label_p): ... into this new function.
(thumb1_legitimate_address_p): Add check for TARGET_HAVE_MOVT and
literal pool.
(thumb_legitimate_constant_p): Add conditional on TARGET_HAVE_MOVT
* doc/invoke.texi (-mpure-code): Change "ARMv7-M targets" for
"M-profile targets with the MOVT instruction".
gcc/testsuite/
* gcc.target/arm/pure-code/pure-code.exp: Add conditional for
check_effective_target_arm_thumb1_movt_ok.
Co-Authored-By: Andre Vieira <andre.simoesdiasvieira@arm.com>
From-SVN: r247585
Diffstat (limited to 'gcc/doc/invoke.texi')
-rw-r--r-- | gcc/doc/invoke.texi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 438e553..68a558e 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -15421,7 +15421,8 @@ by default. Do not allow constant data to be placed in code sections. Additionally, when compiling for ELF object format give all text sections the ELF processor-specific section attribute @code{SHF_ARM_PURECODE}. This option -is only available when generating non-pic code for ARMv7-M targets. +is only available when generating non-pic code for M-profile targets with the +MOVT instruction. @item -mcmse @opindex mcmse |