aarch64: Add +cpa feature flag

This doesn't enable anything within the compiler, but this allows the
flag to be passed the assembler.  There also doesn't appear to be a
kernel cpuinfo name yet.

gcc/ChangeLog:

	* config/aarch64/aarch64-arches.def (V9_5A): Add CPA.
	* config/aarch64/aarch64-option-extensions.def (CPA): New.
	* doc/invoke.texi: Document +cpa.

1 files changed, 3 insertions, 1 deletions

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index c872106..dddde54 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -21672,7 +21672,7 @@ and the features that they enable by default:
 @item @samp{armv9.2-a} @tab Armv9.2-A @tab @samp{armv9.1-a}, @samp{+wfxt}, @samp{+xs}
 @item @samp{armv9.3-a} @tab Armv9.3-A @tab @samp{armv9.2-a}, @samp{+mops}
 @item @samp{armv9.4-a} @tab Armv9.4-A @tab @samp{armv9.3-a}
-@item @samp{armv9.5-a} @tab Armv9.4-A @tab @samp{armv9.4-a}, @samp{+faminmax}, @samp{+lut}
+@item @samp{armv9.5-a} @tab Armv9.4-A @tab @samp{armv9.4-a}, @samp{cpa}, @samp{+faminmax}, @samp{+lut}
 @item @samp{armv8-r} @tab Armv8-R @tab @samp{armv8-r}
 @end multitable
 
@@ -22085,6 +22085,8 @@ extension in streaming mode.
 Enable the Floating Point Absolute Maximum/Minimum extension.
 @item lut
 Enable the Lookup Table extension.
+@item cpa
+Enable the Checked Pointer Arithmetic instructions.
 @item sve-b16b16
 Enable the SVE non-widening brain floating-point (@code{bf16}) extension.
 This only has an effect when @code{sve2} or @code{sme2} are also enabled.