re PR target/85918 (Conversions to/from [unsigned] long long are not vectorized for AVX512DQ target)

	PR target/85918
	* tree.def (VEC_UNPACK_FIX_TRUNC_HI_EXPR, VEC_UNPACK_FIX_TRUNC_LO_EXPR,
	VEC_PACK_FLOAT_EXPR): New tree codes.
	* tree-pretty-print.c (op_code_prio): Handle
	VEC_UNPACK_FIX_TRUNC_HI_EXPR and VEC_UNPACK_FIX_TRUNC_LO_EXPR.
	(dump_generic_node): Handle VEC_UNPACK_FIX_TRUNC_HI_EXPR,
	VEC_UNPACK_FIX_TRUNC_LO_EXPR and VEC_PACK_FLOAT_EXPR.
	* tree-inline.c (estimate_operator_cost): Likewise.
	* gimple-pretty-print.c (dump_binary_rhs): Handle VEC_PACK_FLOAT_EXPR.
	* fold-const.c (const_binop): Likewise.
	(const_unop): Handle VEC_UNPACK_FIX_TRUNC_HI_EXPR and
	VEC_UNPACK_FIX_TRUNC_LO_EXPR.
	* tree-cfg.c (verify_gimple_assign_unary): Likewise.
	(verify_gimple_assign_binary): Handle VEC_PACK_FLOAT_EXPR.
	* cfgexpand.c (expand_debug_expr): Handle VEC_UNPACK_FIX_TRUNC_HI_EXPR,
	VEC_UNPACK_FIX_TRUNC_LO_EXPR and VEC_PACK_FLOAT_EXPR.
	* expr.c (expand_expr_real_2): Likewise.
	* optabs.def (vec_packs_float_optab, vec_packu_float_optab,
	vec_unpack_sfix_trunc_hi_optab, vec_unpack_sfix_trunc_lo_optab,
	vec_unpack_ufix_trunc_hi_optab, vec_unpack_ufix_trunc_lo_optab): New
	optabs.
	* optabs.c (expand_widen_pattern_expr): For
	VEC_UNPACK_FIX_TRUNC_HI_EXPR and VEC_UNPACK_FIX_TRUNC_LO_EXPR use
	sign from result type rather than operand's type.
	(expand_binop_directly): For vec_packu_float_optab and
	vec_packs_float_optab allow result type to be different from operand's
	type.
	* optabs-tree.c (optab_for_tree_code): Handle
	VEC_UNPACK_FIX_TRUNC_HI_EXPR, VEC_UNPACK_FIX_TRUNC_LO_EXPR and
	VEC_PACK_FLOAT_EXPR.  Formatting fixes.
	* tree-vect-generic.c (expand_vector_operations_1):  Handle
	VEC_UNPACK_FIX_TRUNC_HI_EXPR, VEC_UNPACK_FIX_TRUNC_LO_EXPR and
	VEC_PACK_FLOAT_EXPR.
	* tree-vect-stmts.c (supportable_widening_operation): Handle
	FIX_TRUNC_EXPR.
	(supportable_narrowing_operation): Handle FLOAT_EXPR.
	* config/i386/i386.md (fixprefix, floatprefix): New code attributes.
	* config/i386/sse.md (*float<floatunssuffix>v2div2sf2): Rename to ...
	(float<floatunssuffix>v2div2sf2): ... this.  Formatting fix.
	(vpckfloat_concat_mode, vpckfloat_temp_mode, vpckfloat_op_mode): New
	mode attributes.
	(vec_pack<floatprefix>_float_<mode>): New expander.
	(vunpckfixt_mode, vunpckfixt_model, vunpckfixt_extract_mode): New mode
	attributes.
	(vec_unpack_<fixprefix>fix_trunc_lo_<mode>,
	vec_unpack_<fixprefix>fix_trunc_hi_<mode>): New expanders.
	* doc/md.texi (vec_packs_float_@var{m}, vec_packu_float_@var{m},
	vec_unpack_sfix_trunc_hi_@var{m}, vec_unpack_sfix_trunc_lo_@var{m},
	vec_unpack_ufix_trunc_hi_@var{m}, vec_unpack_ufix_trunc_lo_@var{m}):
	Document.
	* doc/generic.texi (VEC_UNPACK_FLOAT_HI_EXPR,
	VEC_UNPACK_FLOAT_LO_EXPR): Fix pasto in description.
	(VEC_UNPACK_FIX_TRUNC_HI_EXPR, VEC_UNPACK_FIX_TRUNC_LO_EXPR,
	VEC_PACK_FLOAT_EXPR): Document.

	* gcc.target/i386/avx512dq-pr85918.c: Add -mprefer-vector-width=512
	and -fno-vect-cost-model options.  Add aligned(64) attribute to the
	arrays.  Add suffix 1 to all functions and use 4 iterations rather
	than N.  Add functions with conversions to and from float.
	Add new set of functions with 8 iterations and another one
	with 16 iterations, expect 24 vectorized loops instead of just 4.
	* gcc.target/i386/avx512dq-pr85918-2.c: New test.

From-SVN: r260893

1 files changed, 25 insertions, 2 deletions

diff --git a/gcc/doc/generic.texi b/gcc/doc/generic.texi
index 653a17c..a4d0af4 100644
--- a/gcc/doc/generic.texi
+++ b/gcc/doc/generic.texi
@@ -1789,9 +1789,12 @@ a value from @code{enum annot_expr_kind}, the third is an @code{INTEGER_CST}.
 @tindex VEC_UNPACK_LO_EXPR
 @tindex VEC_UNPACK_FLOAT_HI_EXPR
 @tindex VEC_UNPACK_FLOAT_LO_EXPR
+@tindex VEC_UNPACK_FIX_TRUNC_HI_EXPR
+@tindex VEC_UNPACK_FIX_TRUNC_LO_EXPR
 @tindex VEC_PACK_TRUNC_EXPR
 @tindex VEC_PACK_SAT_EXPR
 @tindex VEC_PACK_FIX_TRUNC_EXPR
+@tindex VEC_PACK_FLOAT_EXPR
 @tindex VEC_COND_EXPR
 @tindex SAD_EXPR
 
@@ -1846,10 +1849,22 @@ where the values are converted from fixed point to floating point.  The
 single operand is a vector that contains @code{N} elements of the same
 integral type.  The result is a vector that contains half as many elements
 of a floating point type whose size is twice as wide.  In the case of
-@code{VEC_UNPACK_HI_EXPR} the high @code{N/2} elements of the vector are
-extracted, converted and widened.  In the case of @code{VEC_UNPACK_LO_EXPR}
+@code{VEC_UNPACK_FLOAT_HI_EXPR} the high @code{N/2} elements of the vector are
+extracted, converted and widened.  In the case of @code{VEC_UNPACK_FLOAT_LO_EXPR}
 the low @code{N/2} elements of the vector are extracted, converted and widened.
 
+@item VEC_UNPACK_FIX_TRUNC_HI_EXPR
+@itemx VEC_UNPACK_FIX_TRUNC_LO_EXPR
+These nodes represent unpacking of the high and low parts of the input vector,
+where the values are truncated from floating point to fixed point.  The
+single operand is a vector that contains @code{N} elements of the same
+floating point type.  The result is a vector that contains half as many
+elements of an integral type whose size is twice as wide.  In the case of
+@code{VEC_UNPACK_FIX_TRUNC_HI_EXPR} the high @code{N/2} elements of the
+vector are extracted and converted with truncation.  In the case of
+@code{VEC_UNPACK_FIX_TRUNC_LO_EXPR} the low @code{N/2} elements of the
+vector are extracted and converted with truncation.
+
 @item VEC_PACK_TRUNC_EXPR
 This node represents packing of truncated elements of the two input vectors
 into the output vector.  Input operands are vectors that contain the same
@@ -1875,6 +1890,14 @@ twice as many elements of an integral type whose size is half as wide.  The
 elements of the two vectors are merged (concatenated) to form the output
 vector.
 
+@item VEC_PACK_FLOAT_EXPR
+This node represents packing of elements of the two input vectors into the
+output vector, where the values are converted from fixed point to floating
+point.  Input operands are vectors that contain the same number of elements
+of an integral type.  The result is a vector that contains twice as many
+elements of floating point type whose size is half as wide.  The elements of
+the two vectors are merged (concatenated) to form the output vector.
+
 @item VEC_COND_EXPR
 These nodes represent @code{?:} expressions.  The three operands must be
 vectors of the same size and number of elements.  The second and third