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| author | Kirill Yukhin <kirill.yukhin@intel.com> | 2012-05-02 15:32:01 +0000 |
|---|---|---|
| committer | Kirill Yukhin <kyukhin@gcc.gnu.org> | 2012-05-02 15:32:01 +0000 |
| commit | 5dcfdccd32b5b06a29caf45469203c67da526b41 (patch) | |
| tree | 646070e1ed039d18a1ce731130e83a8dc29bb3f1 /gcc/doc/extend.texi | |
| parent | 68e7284038237a5ed0f4a7bdf2cf16b6f8e55c7e (diff) | |
| download | gcc-5dcfdccd32b5b06a29caf45469203c67da526b41.zip gcc-5dcfdccd32b5b06a29caf45469203c67da526b41.tar.gz gcc-5dcfdccd32b5b06a29caf45469203c67da526b41.tar.bz2 | |
ChangeLog entry:
* coretypes (MEMMODEL_MASK): New.
* builtins.c (get_memmodel): Add val. Call target.memmodel_check
and return new variable.
(expand_builtin_atomic_exchange): Mask memmodel values.
(expand_builtin_atomic_compare_exchange): Ditto.
(expand_builtin_atomic_load): Ditto.
(expand_builtin_atomic_store): Ditto.
(expand_builtin_atomic_clear): Ditto.
* doc/extend.texi: Mention port-dependent memory model flags.
* config/i386/cpuid.h (bit_HLE): New.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
HLE support.
* config/i386/i386-protos.h (ix86_generate_hle_prefix): New.
* config/i386/i386-c.c (ix86_target_macros_internal): Set
HLE defines.
(ix86_target_string)<-mhle>: New.
(ix86_valid_target_attribute_inner_p)<OPT_mhle>: Ditto.
* config/i386/i386.c (ix86_target_string)<OPTION_MASK_ISA_HLE>:
New.
(ix86_valid_target_attribute_inner_p)<OPT_mhle>: Ditto.
(ix86_option_override_internal)<PTA_HLE>: New switch, set it
enabled for generic, generic64 and core-avx2.
(ix86_print_operand): Generate HLE lock prefixes.
(ix86_memmodel_check): New.
(TARGET_MEMMODEL_CHECK): Ditto.
* config/i386/i386.h (OPTION_ISA_HLE): Ditto.
(IX86_HLE_ACQUIRE): Ditto.
(IX86_HLE_RELEASE): Ditto.
* config/i386/i386.h (ix86_generate_hle_prefix): Ditto.
* config/i386/i386.opt (mhle): Ditto.
* config/i386/sync.md(atomic_compare_and_swap<mode>): Pass
success model to instruction emitter.
(atomic_fetch_add<mode>): Ditto.
(atomic_exchange<mode>): Ditto.
(atomic_add<mode>): Ditto.
(atomic_sub<mode>): Ditto.
(atomic_<code><mode>): Ditto.
(*atomic_compare_and_swap_doubledi_pic): Ditto.
(atomic_compare_and_swap_single<mode>): Define and use argument
for success model.
(atomic_compare_and_swap_double<mode>): Ditto.
* configure.ac: Check if assembler support HLE prefixes.
* configure: Regenerate.
* config.in: Ditto.
testsuite/ChangeLog entry:
* gcc.target/i386/hle-cmpxchg-acq-1.c: New.
* gcc.target/i386/hle-cmpxchg-rel-1.c: Ditto.
* gcc.target/i386/hle-add-acq-1.c: Ditto.
* gcc.target/i386/hle-add-rel-1.c: Ditto.
* gcc.target/i386/hle-and-acq-1.c: Ditto.
* gcc.target/i386/hle-and-rel-1.c: Ditto.
* gcc.target/i386/hle-or-acq-1.c: Ditto.
* gcc.target/i386/hle-or-rel-1.c: Ditto.
* gcc.target/i386/hle-sub-acq-1.c: Ditto.
* gcc.target/i386/hle-sub-rel-1.c: Ditto.
* gcc.target/i386/hle-xadd-acq-1.c: Ditto.
* gcc.target/i386/hle-xadd-rel-1.c: Ditto.
* gcc.target/i386/hle-xchg-acq-1.c: Ditto.
* gcc.target/i386/hle-xchg-rel-1.c: Ditto.
* gcc.target/i386/hle-xor-acq-1.c: Ditto.
* gcc.target/i386/hle-xor-rel-1.c: Ditto.
Co-Authored-By: Andi Kleen <ak@linux.intel.com>
From-SVN: r187051
Diffstat (limited to 'gcc/doc/extend.texi')
| -rw-r--r-- | gcc/doc/extend.texi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 95cea83..5d55ea8 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -7093,7 +7093,8 @@ to the same names in the C++11 standard. Refer there or to the atomic synchronization} for more detailed definitions. These memory models integrate both barriers to code motion as well as synchronization requirements with other threads. These are listed in approximately -ascending order of strength. +ascending order of strength. It is also possible to use target specific +flags for memory model flags, like Hardware Lock Elision. @table @code @item __ATOMIC_RELAXED |