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| author | Edwin Lu <ewlu@rivosinc.com> | 2023-11-01 10:30:18 -0700 |
|---|---|---|
| committer | Edwin Lu <ewlu@rivosinc.com> | 2023-11-02 15:55:43 -0700 |
| commit | a29ce9bf8d87e632840bacacb663ece90a5c7710 (patch) | |
| tree | ad68d681497571d00ba1aba52a67738018e25dd0 /gcc/d | |
| parent | 7c1d011bc1f8b26dba4ebcbd4a429628dfb2698d (diff) | |
| download | gcc-a29ce9bf8d87e632840bacacb663ece90a5c7710.zip gcc-a29ce9bf8d87e632840bacacb663ece90a5c7710.tar.gz gcc-a29ce9bf8d87e632840bacacb663ece90a5c7710.tar.bz2 | |
RISC-V: Add check for types without insn reservations
Now that all insns are guaranteed to have a type, ensure every insn
is associated with a cpu unit/insn reservation.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_sched_variable_issue): add disabled assert
Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
Diffstat (limited to 'gcc/d')
0 files changed, 0 insertions, 0 deletions