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| author | Sudakshina Das <sudi.das@arm.com> | 2017-10-04 16:59:40 +0000 |
|---|---|---|
| committer | James Greenhalgh <jgreenhalgh@gcc.gnu.org> | 2017-10-04 16:59:40 +0000 |
| commit | ab6501d713bb9de29609bd99b40da3f479e504b6 (patch) | |
| tree | 97297f308bbbc9787451edba999be6621050b15a /gcc/cp/cfns.h | |
| parent | b419102c126ef6fa1b80566bbe9cb299ef860432 (diff) | |
| download | gcc-ab6501d713bb9de29609bd99b40da3f479e504b6.zip gcc-ab6501d713bb9de29609bd99b40da3f479e504b6.tar.gz gcc-ab6501d713bb9de29609bd99b40da3f479e504b6.tar.bz2 | |
[PATCH][AArch64] Add BIC-imm and ORR-imm SIMD pattern
This patch adds the support for BIC (vector, immediate) and
ORR (vector, immediate) SIMD patterns to the AArch64 backend.
Committed on behalf of Sudi Das.
Reviewed-by: Richard Earnshaw <Richard.Earnshaw@arm.com>
Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com>
gcc/
* config/aarch64/aarch64-protos.h (enum simd_immediate_check): New
check type for aarch64_simd_valid_immediate.
(aarch64_output_simd_mov_immediate): Update prototype.
(aarch64_simd_valid_immediate): Update prototype.
* config/aarch64/aarch64-simd.md (orr<mode>3): modified pattern to add
support for ORR-immediate.
(and<mode>3): modified pattern to add support for BIC-immediate.
* config/aarch64/aarch64.c (aarch64_simd_valid_immediate): Function
now checks for valid immediate for BIC and ORR based on new enum
argument.
(aarch64_output_simd_mov_immediate): Function now used to output
BIC/ORR imm as well based on new enum argument.
* config/aarch64/constraints.md (Do): New vector immediate constraint.
(Db) : Likewise.
* config/aarch64/predicates.md (aarch64_reg_or_orr_imm): New predicate.
(aarch64_reg_or_bic_imm): Likewise.
gcc/testsuite/
* gcc.target/aarch64/bic_imm_1.c: New test.
* gcc.target/aarch64/orr_imm_1.c: Likewise.
From-SVN: r253422
Diffstat (limited to 'gcc/cp/cfns.h')
0 files changed, 0 insertions, 0 deletions