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| author | Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> | 2021-05-27 19:04:12 +0900 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2022-06-13 17:25:48 -0700 |
| commit | 70ce04ca353bb0cda8321b91a77c2477e26d339b (patch) | |
| tree | 024ec5354e8f68d1928e3d3ea97b3f044ac24d26 /gcc/config/xtensa | |
| parent | e1b193c1cce3a975a9ed60dd0f30182fe0255d7c (diff) | |
| download | gcc-70ce04ca353bb0cda8321b91a77c2477e26d339b.zip gcc-70ce04ca353bb0cda8321b91a77c2477e26d339b.tar.gz gcc-70ce04ca353bb0cda8321b91a77c2477e26d339b.tar.bz2 | |
xtensa: Make use of BALL/BNALL instructions
In Xtensa ISA, there is no single machine instruction that calculates unary
bitwise negation, but a few similar fused instructions are exist:
"BALL Ax, Ay, label" // if ((~Ax & Ay) == 0) goto label;
"BNALL Ax, Ay, label" // if ((~Ax & Ay) != 0) goto label;
These instructions have never been emitted before, but it seems no reason not
to make use of them.
gcc/ChangeLog:
* config/xtensa/xtensa.md (*masktrue_bitcmpl): New insn pattern.
gcc/testsuite/ChangeLog:
* gcc.target/xtensa/BALL-BNALL.c: New.
Diffstat (limited to 'gcc/config/xtensa')
| -rw-r--r-- | gcc/config/xtensa/xtensa.md | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 449e4b2..a4477e2 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -1628,6 +1628,27 @@ (set_attr "mode" "none") (set_attr "length" "3")]) +(define_insn "*masktrue_bitcmpl" + [(set (pc) + (if_then_else (match_operator 3 "boolean_operator" + [(and:SI (not:SI (match_operand:SI 0 "register_operand" "r")) + (match_operand:SI 1 "register_operand" "r")) + (const_int 0)]) + (label_ref (match_operand 2 "" "")) + (pc)))] + "" +{ + switch (GET_CODE (operands[3])) + { + case EQ: return "ball\t%0, %1, %2"; + case NE: return "bnall\t%0, %1, %2"; + default: gcc_unreachable (); + } +} + [(set_attr "type" "jump") + (set_attr "mode" "none") + (set_attr "length" "3")]) + ;; Zero-overhead looping support. |