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authorRoger Sayle <roger@nextmovesoftware.com>2023-04-23 10:30:30 +0100
committerRoger Sayle <roger@nextmovesoftware.com>2023-04-23 10:30:30 +0100
commit9a6e5b933fedd6a386c8bde7f93e3e0d4515030b (patch)
treea8e2c53cab461367878a8a7af87bd2d13b463d89 /gcc/config/stormy16
parent987caaae343ec8277391c875549859f8a288fd81 (diff)
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[xstormy16] Add extendhisi2 and zero_extendhisi2 patterns to stormy16.md
This patch adds a pair of define_insn patterns to the xstormy16 machine description that provide extendhisi2 and zero_extendhisi2, i.e. 16-bit to 32-bit sign- and zero-extension respectively. This functionality is already synthesized during RTL expansion, but providing patterns allow the semantics to be exposed to the RTL optimizers. To simplify things, this patch introduces a new %h0 output format, for emitting the high_part register name of a double-word (SImode) register pair. The actual code generated is identical to before. Whilst there, I also fixed the instruction lengths and formatting of the zero_extendqihi2 pattern. Then, mostly for documentation purposes as the 'T' constraint isn't yet implemented, I've added a "and Rx,#255" alternative to zero_extendqihi2 that takes advantage of its efficient instruction encoding. 2023-04-23 Roger Sayle <roger@nextmovesoftware.com> gcc/ChangeLog * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h format specifier to output high_part register name of SImode reg. * config/stormy16/stormy16.md (extendhisi2): New define_insn. (zero_extendqihi2): Fix lengths, consistent formatting and add "and Rx,#255" alternative, for documentation purposes. (zero_extendhisi2): New define_insn. gcc/testsuite/ChangeLog * gcc.target/xstormy16/extendhisi2.c: New test case. * gcc.target/xstormy16/zextendhisi2.c: Likewise.
Diffstat (limited to 'gcc/config/stormy16')
-rw-r--r--gcc/config/stormy16/stormy16.cc8
-rw-r--r--gcc/config/stormy16/stormy16.md31
2 files changed, 32 insertions, 7 deletions
diff --git a/gcc/config/stormy16/stormy16.cc b/gcc/config/stormy16/stormy16.cc
index cf2f807..647b72c 100644
--- a/gcc/config/stormy16/stormy16.cc
+++ b/gcc/config/stormy16/stormy16.cc
@@ -1828,6 +1828,14 @@ xstormy16_print_operand (FILE *file, rtx x, int code)
return;
}
+ case 'h':
+ /* Print the highpart register of an SI mode register pair. */
+ if (REG_P (x) && GET_MODE (x) == SImode)
+ fputs (reg_names [REGNO (x) + 1], file);
+ else
+ output_operand_lossage ("'h' operand is not SImode register");
+ return;
+
case 0:
/* Handled below. */
break;
diff --git a/gcc/config/stormy16/stormy16.md b/gcc/config/stormy16/stormy16.md
index d27c9fb..fd52588 100644
--- a/gcc/config/stormy16/stormy16.md
+++ b/gcc/config/stormy16/stormy16.md
@@ -268,17 +268,34 @@
""
"cbw %0")
+(define_insn "extendhisi2"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (sign_extend:SI (match_operand:HI 1 "register_operand" "0")))]
+ ""
+ "mov %h0,%0 | asr %h0,#15"
+ [(set_attr "length" "4")
+ (set_attr "psw_operand" "clobber")])
+
(define_insn "zero_extendqihi2"
- [(set (match_operand:HI 0 "register_operand" "=e,r")
- (zero_extend:HI (match_operand:QI 1 "nonimmediate_operand" "m,0")))]
+ [(set (match_operand:HI 0 "register_operand" "=e,T,r")
+ (zero_extend:HI (match_operand:QI 1 "nonimmediate_operand" "m,0,0")))]
""
"@
- mov.b %0, %1
- shl %0,#8\n\tshr %0,#8"
- [(set_attr "psw_operand" "nop,0")
+ mov.b %0,%1
+ and Rx,#255
+ shl %0,#8 | shr %0,#8"
+ [(set_attr "psw_operand" "nop,nop,0")
(set_attr_alternative "length"
- [(const_int 4)
- (const_int 8)])])
+ [(const_int 2)
+ (const_int 2)
+ (const_int 4)])])
+
+(define_insn "zero_extendhisi2"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (zero_extend:SI (match_operand:HI 1 "register_operand" "0")))]
+ ""
+ "mov %h0,#0"
+ [(set_attr "psw_operand" "clobber")])
;; ::::::::::::::::::::
;; ::