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| author | Sa Liu <saliu@de.ibm.com> | 2007-07-13 18:31:08 +0000 |
|---|---|---|
| committer | Ulrich Weigand <uweigand@gcc.gnu.org> | 2007-07-13 18:31:08 +0000 |
| commit | 39aeae8573ed2085fbfad05f3e8ba1456fcb6d44 (patch) | |
| tree | 5426797cdb67dde5f5c7640c88b2c18b729ddd9b /gcc/config/spu/spu_intrinsics.h | |
| parent | 2826df069f786fb321bb60525340fffaa1f22b6b (diff) | |
| download | gcc-39aeae8573ed2085fbfad05f3e8ba1456fcb6d44.zip gcc-39aeae8573ed2085fbfad05f3e8ba1456fcb6d44.tar.gz gcc-39aeae8573ed2085fbfad05f3e8ba1456fcb6d44.tar.bz2 | |
config.gcc: Add options for arch and tune on SPU.
2007-07-13 Sa Liu <saliu@de.ibm.com>
* config.gcc: Add options for arch and tune on SPU.
* config/spu/predicates.md: Add constant operands 0 and 1.
* config/spu/spu-builtins.def: Add builtins for double precision
floating point comparison: si_dfceq, si_dfcmeq, si_dfcgt, si_dfcmgt,
si_dftsv, spu_cmpeq_13, spu_cmpabseq_1, spu_cmpgt_13, spu_cmpabsgt_1,
spu_testsv.
* config/spu/spu-c.c: Define __SPU_EDP__ when builtins invoked with
a CELLEDP target.
* config/spu/spu-protos.h: Add new function prototypes.
* config/spu/spu.c (spu_override_options): Check options -march and
-mtune.
(spu_comp_icode): Add comparison code for DFmode and vector mode.
(spu_emit_branch_or_set): Use the new code for DFmode and vector
mode comparison.
(spu_const_from_int): New. Create a vector constant from 4 ints.
(get_vec_cmp_insn): New. Get insn index of vector compare instruction.
(spu_emit_vector_compare): New. Emit vector compare.
(spu_emit_vector_cond_expr): New. Emit vector conditional expression.
* config/spu/spu.h: Add options -march and -mtune. Define processor
types PROCESSOR_CELL and PROCESSOR_CELLEDP. Define macro
CANONICALIZE_COMPARISON.
* config/spu/spu.md: Add new insns for double precision compare
and double precision vector compare. Add vcond and smax/smin patterns
to enable DFmode vector conditional expression.
* config/spu/spu.opt: Add options -march and -mtune.
* config/spu/spu_internals.h: Add builtins for CELLEDP target:
si_dfceq, si_dfcmeq, si_dfcgt, si_dfcmgt, si_dftsv. Add builtin for
both CELL and CELLEDP targets: spu_testsv.
* config/spu/spu_intrinsics.h: Add flag mnemonics for test special
values.
testsuite/
* gcc.dg/vect/fast-math-vect-reduc-7.c: Switch on test
for V2DFmode vector conditional expression.
* gcc.target/spu/dfcmeq.c: New. Test combination of abs
and dfceq patterns.
* gcc.target/spu/dfcmgt.c: New. Test combination of abs
and dfcgt patterns.
* gcc.target/spu/intrinsics-2.c: New. Test intrinsics for
V2DFmode comparison and test special values.
* lib/target-supports.exp: Switch on test for V2DFmode
vector conditional expression.
From-SVN: r126626
Diffstat (limited to 'gcc/config/spu/spu_intrinsics.h')
| -rw-r--r-- | gcc/config/spu/spu_intrinsics.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/gcc/config/spu/spu_intrinsics.h b/gcc/config/spu/spu_intrinsics.h index ca91927..faaf8a6 100644 --- a/gcc/config/spu/spu_intrinsics.h +++ b/gcc/config/spu/spu_intrinsics.h @@ -70,6 +70,16 @@ #define MFC_WrListStallAck 26 #define MFC_RdAtomicStat 27 +/* Bit flag mnemonics for test special value. + */ +#define SPU_SV_NEG_DENORM 0x01 /* negative denormalized number */ +#define SPU_SV_POS_DENORM 0x02 /* positive denormalized number */ +#define SPU_SV_NEG_ZERO 0x04 /* negative zero */ +#define SPU_SV_POS_ZERO 0x08 /* positive zero */ +#define SPU_SV_NEG_INFINITY 0x10 /* negative infinity */ +#define SPU_SV_POS_INFINITY 0x20 /* positive infinity */ +#define SPU_SV_NAN 0x40 /* not a number */ + #include <spu_internals.h> #endif /* _SPU_INTRINSICS_H */ |