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author | David S. Miller <davem@davemloft.net> | 2011-11-07 02:22:40 +0000 |
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committer | David S. Miller <davem@gcc.gnu.org> | 2011-11-06 18:22:40 -0800 |
commit | 6e25d659c18bf160c3ea39e0a5447ff77f379774 (patch) | |
tree | 6fb6c8d3bac06402d4e030988344a6260bc71128 /gcc/config/sparc | |
parent | 2805cc271bd7072f92f36a08cefcb153dc2024c5 (diff) | |
download | gcc-6e25d659c18bf160c3ea39e0a5447ff77f379774.zip gcc-6e25d659c18bf160c3ea39e0a5447ff77f379774.tar.gz gcc-6e25d659c18bf160c3ea39e0a5447ff77f379774.tar.bz2 |
Get rid of sparc's UNSPEC_SHORT_LOAD.
* config/sparc/sparc.md (UNSPEC_SHORT_LOAD): Delete.
(zero_extend_v8qi_vis, zero_extend_v4hi_vis,
*zero_extend_v8qi_<P:mode>_insn,
*zero_extend_v4hi_<P:mode>_insn): Express using vec_merge
and vec_duplicate instead of using an UNSPEC.
From-SVN: r181063
Diffstat (limited to 'gcc/config/sparc')
-rw-r--r-- | gcc/config/sparc/sparc.md | 33 |
1 files changed, 22 insertions, 11 deletions
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index 7452f96..56f4dc0 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -92,7 +92,6 @@ (UNSPEC_MUL8 86) (UNSPEC_MUL8SU 87) (UNSPEC_MULDSU 88) - (UNSPEC_SHORT_LOAD 89) ]) (define_constants @@ -7833,8 +7832,11 @@ (define_expand "zero_extend_v8qi_vis" [(set (match_operand:V8QI 0 "register_operand" "") - (unspec:V8QI [(match_operand:QI 1 "memory_operand" "")] - UNSPEC_SHORT_LOAD))] + (vec_merge:V8QI + (vec_duplicate:V8QI + (match_operand:QI 1 "memory_operand" "")) + (match_dup 2) + (const_int 254)))] "TARGET_VIS" { if (! REG_P (XEXP (operands[1], 0))) @@ -7842,12 +7844,16 @@ rtx addr = force_reg (Pmode, XEXP (operands[1], 0)); operands[1] = replace_equiv_address (operands[1], addr); } + operands[2] = CONST0_RTX (V8QImode); }) (define_expand "zero_extend_v4hi_vis" [(set (match_operand:V4HI 0 "register_operand" "") - (unspec:V4HI [(match_operand:HI 1 "memory_operand" "")] - UNSPEC_SHORT_LOAD))] + (vec_merge:V4HI + (vec_duplicate:V4HI + (match_operand:HI 1 "memory_operand" "")) + (match_dup 2) + (const_int 14)))] "TARGET_VIS" { if (! REG_P (XEXP (operands[1], 0))) @@ -7855,21 +7861,26 @@ rtx addr = force_reg (Pmode, XEXP (operands[1], 0)); operands[1] = replace_equiv_address (operands[1], addr); } + operands[2] = CONST0_RTX (V4HImode); }) (define_insn "*zero_extend_v8qi_<P:mode>_insn" [(set (match_operand:V8QI 0 "register_operand" "=e") - (unspec:V8QI [(mem:QI - (match_operand:P 1 "register_operand" "r"))] - UNSPEC_SHORT_LOAD))] + (vec_merge:V8QI + (vec_duplicate:V8QI + (mem:QI (match_operand:P 1 "register_operand" "r"))) + (match_operand:V8QI 2 "const_zero_operand" "Y") + (const_int 254)))] "TARGET_VIS" "ldda\t[%1] 0xd0, %0") (define_insn "*zero_extend_v4hi_<P:mode>_insn" [(set (match_operand:V4HI 0 "register_operand" "=e") - (unspec:V4HI [(mem:HI - (match_operand:P 1 "register_operand" "r"))] - UNSPEC_SHORT_LOAD))] + (vec_merge:V4HI + (vec_duplicate:V4HI + (mem:HI (match_operand:P 1 "register_operand" "r"))) + (match_operand:V4HI 2 "const_zero_operand" "Y") + (const_int 14)))] "TARGET_VIS" "ldda\t[%1] 0xd2, %0") |