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authorRichard Stallman <rms@gnu.org>1993-10-20 22:22:43 +0000
committerRichard Stallman <rms@gnu.org>1993-10-20 22:22:43 +0000
commit297c72b635e085bea63af0a9f7e9a7b958a41da0 (patch)
tree295afafe19e6c30fa9c86b9d2f4a5952bbbd9c76 /gcc/config/sparc
parent92dee628c1b1e2819e6869feceb0943e25b30320 (diff)
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(INITIALIZE_TRAMPOLINE): Emit 3 flush instrutions.
From-SVN: r5840
Diffstat (limited to 'gcc/config/sparc')
-rw-r--r--gcc/config/sparc/sparc.h14
1 files changed, 13 insertions, 1 deletions
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index a60f80b..e988bbf 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -1015,7 +1015,10 @@ extern union tree_node *current_function_decl;
This takes 16 insns: 2 shifts & 2 ands (to split up addresses), 4 sethi
(to load in opcodes), 4 iors (to merge address and opcodes), and 4 writes
(to store insns). This is a bit excessive. Perhaps a different
- mechanism would be better here. */
+ mechanism would be better here.
+
+ Emit 3 FLUSH instructions (UNSPEC_VOLATILE 2) to synchonize the data
+ and instruction caches. */
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
@@ -1046,6 +1049,15 @@ extern union tree_node *current_function_decl;
emit_move_insn (tem, g1_ori); \
emit_insn (gen_iorsi3 (low_cxt, low_cxt, tem)); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 16)), low_cxt);\
+ emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode, \
+ gen_rtvec (1, plus_constant (TRAMP, 0)), \
+ 2)); \
+ emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode, \
+ gen_rtvec (1, plus_constant (TRAMP, 8)), \
+ 2)); \
+ emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode, \
+ gen_rtvec (1, plus_constant (TRAMP, 16)), \
+ 2)); \
}
/* Generate necessary RTL for __builtin_saveregs().