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| author | Eric Botcazou <ebotcazou@adacore.com> | 2013-08-02 21:41:58 +0000 |
|---|---|---|
| committer | Eric Botcazou <ebotcazou@gcc.gnu.org> | 2013-08-02 21:41:58 +0000 |
| commit | 13ec0527eae61e42c9b0356a9752d6fa4702c2c3 (patch) | |
| tree | bcb6148b7d9d28bb66be04f13d7efe19d28bfb32 /gcc/config/sparc | |
| parent | a572c4549742bb0876335f3be4c5a76fac555454 (diff) | |
| download | gcc-13ec0527eae61e42c9b0356a9752d6fa4702c2c3.zip gcc-13ec0527eae61e42c9b0356a9752d6fa4702c2c3.tar.gz gcc-13ec0527eae61e42c9b0356a9752d6fa4702c2c3.tar.bz2 | |
sparc.c (sparc_emit_membar_for_model): Add the implied StoreLoad barrier for atomic operations if before.
* config/sparc/sparc.c (sparc_emit_membar_for_model) <SMM_TSO>: Add
the implied StoreLoad barrier for atomic operations if before.
From-SVN: r201450
Diffstat (limited to 'gcc/config/sparc')
| -rw-r--r-- | gcc/config/sparc/sparc.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 48c25dc..87cfaca 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -11318,6 +11318,11 @@ sparc_emit_membar_for_model (enum memmodel model, /* Total Store Ordering: all memory transactions with store semantics are followed by an implied StoreStore. */ implied |= StoreStore; + + /* If we're not looking for a raw barrer (before+after), then atomic + operations get the benefit of being both load and store. */ + if (load_store == 3 && before_after == 1) + implied |= StoreLoad; /* FALLTHRU */ case SMM_PSO: |