aboutsummaryrefslogtreecommitdiff
path: root/gcc/config/sparc/sol2.h
diff options
context:
space:
mode:
authorSheldon Lobo <sheldon.lobo@oracle.com>2017-05-18 09:34:26 +0000
committerSheldon Lobo <smlobo@gcc.gnu.org>2017-05-18 09:34:26 +0000
commit00a84d0eddec8e671f48e209fffac7c97e6bc4bf (patch)
tree3073cf46a77e5e964b3e0c4db99086e8a4fe43b8 /gcc/config/sparc/sol2.h
parent243c288370fe51ba55c3a9ee61eb2a1a62cb1279 (diff)
downloadgcc-00a84d0eddec8e671f48e209fffac7c97e6bc4bf.zip
gcc-00a84d0eddec8e671f48e209fffac7c97e6bc4bf.tar.gz
gcc-00a84d0eddec8e671f48e209fffac7c97e6bc4bf.tar.bz2
Minor SPARC T4 and M7 fixes and additions.
* config/sparc/sparc.c (sparc_option_override): Set function alignment for -mcpu=niagara7 to 64 to match the I$ line. * config/sparc/sparc.h (BRANCH_COST): Set the SPARC M7 branch latency to 1. * config/sparc/sparc.h (BRANCH_COST): Set the SPARC T4 branch latency to 2. * config/sparc/sol2.h: Fix a ASM_CPU32_DEFAULT_SPEC typo. * gcc.target/sparc/niagara7-align.c: New test. From-SVN: r248184
Diffstat (limited to 'gcc/config/sparc/sol2.h')
-rw-r--r--gcc/config/sparc/sol2.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/sparc/sol2.h b/gcc/config/sparc/sol2.h
index db24ca3..8a50bfe 100644
--- a/gcc/config/sparc/sol2.h
+++ b/gcc/config/sparc/sol2.h
@@ -169,7 +169,7 @@ along with GCC; see the file COPYING3. If not see
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
-#define ASM_CPU32_DEFAUILT_SPEC AS_SPARC32_FLAG AS_NIAGARA7_FLAG
+#define ASM_CPU32_DEFAULT_SPEC AS_SPARC32_FLAG AS_NIAGARA7_FLAG
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG AS_NIAGARA7_FLAG
#endif