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| author | Joseph Myers <joseph@codesourcery.com> | 2017-08-16 00:42:23 +0100 |
|---|---|---|
| committer | Joseph Myers <jsm28@gcc.gnu.org> | 2017-08-16 00:42:23 +0100 |
| commit | aaf46c35d38b85342076e6c07f9a13afd598a38d (patch) | |
| tree | 01bb4b9c7a8279f28e5be23b7a59629bf0c42da9 /gcc/config/sh | |
| parent | 6b789c7f5aa91ef23d8b41e564cc30cc87b77d4c (diff) | |
| download | gcc-aaf46c35d38b85342076e6c07f9a13afd598a38d.zip gcc-aaf46c35d38b85342076e6c07f9a13afd598a38d.tar.gz gcc-aaf46c35d38b85342076e6c07f9a13afd598a38d.tar.bz2 | |
Limit SH strncmp inline expansion (PR target/78460).
GCC mainline built for sh4-linux-gnu runs out of memory building a
glibc test, which calls strncmp with very large constant size
argument, resulting in the SH inline strncmp expansion trying to
inline a fully unrolled expansion of strncmp for that size.
This patch limits that fully unrolled expansion to the case of less
than 32 bytes. This is explicitly *not* trying to be optimal in any
way (very likely a lower threshold makes sense), just to limit enough
to avoid the out-of-memory issue in the glibc testsuite.
I have *not* run the GCC testsuite for SH. I have verified that this
allows the glibc testsuite to build OK, with both GCC mainline and GCC
7 branch (and that the included test builds quickly with patched GCC,
runs out of memory with unpatched GCC).
PR target/78460
PR target/67712
gcc:
* config/sh/sh-mem.cc (sh_expand_cmpnstr): Only unroll for
constant count if that count is less than 32.
gcc/testsuite:
* gcc.c-torture/compile/string-large-1.c: New test.
From-SVN: r251108
Diffstat (limited to 'gcc/config/sh')
| -rw-r--r-- | gcc/config/sh/sh-mem.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/sh/sh-mem.cc b/gcc/config/sh/sh-mem.cc index 3f7041c..8fce979 100644 --- a/gcc/config/sh/sh-mem.cc +++ b/gcc/config/sh/sh-mem.cc @@ -349,12 +349,13 @@ sh_expand_cmpnstr (rtx *operands) rtx len = copy_to_mode_reg (SImode, operands[3]); int constp = CONST_INT_P (operands[3]); + HOST_WIDE_INT bytes = constp ? INTVAL (operands[3]) : 0; const unsigned int addr1_alignment = MEM_ALIGN (operands[1]) / BITS_PER_UNIT; const unsigned int addr2_alignment = MEM_ALIGN (operands[2]) / BITS_PER_UNIT; /* Loop on a register count. */ - if (constp) + if (constp && bytes >= 0 && bytes < 32) { rtx tmp0 = gen_reg_rtx (SImode); rtx tmp3 = gen_reg_rtx (SImode); @@ -363,7 +364,6 @@ sh_expand_cmpnstr (rtx *operands) rtx_code_label *L_loop_long = gen_label_rtx (); rtx_code_label *L_end_loop_long = gen_label_rtx (); - int bytes = INTVAL (operands[3]); int witers = bytes / 4; if (witers > 1) |