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authorOleg Endo <olegendo@gcc.gnu.org>2016-02-13 00:50:25 +0000
committerOleg Endo <olegendo@gcc.gnu.org>2016-02-13 00:50:25 +0000
commit7e05dad86b2e9eb37c40c9fa2d8de7513e3474c2 (patch)
tree2294a92ac08d1206d74c43b39365ec35a39d013b /gcc/config/sh
parentcd544f0db9789bfa5a11d5e04c5376ee6946154b (diff)
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re PR target/67636 ([SH] gcc.target/sh/pr54236-1.c failures)
gcc/ PR target/67636 PR target/64345 * config/sh/sh.md (*zero_extract_3): New insn_and_split pattern. gcc/testsuite/ PR target/67636 PR target/64345 * gcc.target/sh/pr54236-1.c: Adjust optimization level. From-SVN: r233397
Diffstat (limited to 'gcc/config/sh')
-rw-r--r--gcc/config/sh/sh.md25
1 files changed, 25 insertions, 0 deletions
diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index 203215a..b5b0f95 100644
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -14616,6 +14616,31 @@ label:
[(set (reg:SI T_REG)
(zero_extract:SI (match_dup 0) (const_int 1) (match_dup 1)))])
+(define_insn_and_split "*zero_extract_3"
+ [(set (match_operand:SI 0 "arith_reg_dest")
+ (and:SI (lshiftrt:SI (match_operand:SI 1 "arith_reg_operand")
+ (match_operand 2 "const_int_operand"))
+ (match_operand 3 "const_int_operand")))
+ (clobber (reg:SI T_REG))]
+ "TARGET_SH1 && can_create_pseudo_p ()
+ && exact_log2 (INTVAL (operands[3])) >= 0"
+ "#"
+ "&& 1"
+ [(const_int 0)]
+{
+ int rshift = INTVAL (operands[2]);
+ int lshift = exact_log2 (INTVAL (operands[3]));
+
+ rtx tmp = gen_reg_rtx (SImode);
+ emit_insn (gen_rtx_PARALLEL (VOIDmode,
+ gen_rtvec (2,
+ gen_rtx_SET (tmp,
+ gen_rtx_ZERO_EXTRACT (SImode, operands[1], const1_rtx,
+ GEN_INT (rshift + lshift))),
+ gen_rtx_CLOBBER (VOIDmode, get_t_reg_rtx ()))));
+ emit_insn (gen_ashlsi3 (operands[0], tmp, GEN_INT (lshift)));
+})
+
;; -------------------------------------------------------------------------
;; SH2A instructions for bitwise operations.
;; FIXME: Convert multiple instruction insns to insn_and_split.