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authorStefan Schulze Frielinghaus <stefansf@gcc.gnu.org>2025-01-20 10:01:08 +0100
committerStefan Schulze Frielinghaus <stefansf@gcc.gnu.org>2025-01-20 10:01:08 +0100
commit447b917e98ee34e2eae455b43784ab6a86b604f2 (patch)
treed1ff88af20f8d271da8221ee53f1a97f9756984f /gcc/config/s390
parentb963174abfb601bc39504d09ac6b86c53660e170 (diff)
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s390: arch15: New instruction variants supporting 128-bit integer
Add new instruction variants and also extend builtins in order to deal with 128-bit integer. gcc/ChangeLog: * config/s390/s390-builtins.def: Add new instruction variants. * config/s390/s390-builtin-types.def: Update accordingly. * config/s390/vecintrin.h: Add new defines. * config/s390/vector.md: Adapt insns for new instruction variants. * config/s390/vx-builtins.md: Ditto.
Diffstat (limited to 'gcc/config/s390')
-rw-r--r--gcc/config/s390/s390-builtin-types.def58
-rw-r--r--gcc/config/s390/s390-builtins.def182
-rw-r--r--gcc/config/s390/vecintrin.h7
-rw-r--r--gcc/config/s390/vector.md60
-rw-r--r--gcc/config/s390/vx-builtins.md146
5 files changed, 329 insertions, 124 deletions
diff --git a/gcc/config/s390/s390-builtin-types.def b/gcc/config/s390/s390-builtin-types.def
index 2993aea..f995fe4 100644
--- a/gcc/config/s390/s390-builtin-types.def
+++ b/gcc/config/s390/s390-builtin-types.def
@@ -58,6 +58,7 @@ DEF_TYPE (BT_FLT, float_type_node, 0)
DEF_TYPE (BT_FLTCONST, float_type_node, 1)
DEF_TYPE (BT_INT, integer_type_node, 0)
DEF_TYPE (BT_INT128, intTI_type_node, 0)
+DEF_TYPE (BT_INT128CONST, intTI_type_node, 1)
DEF_TYPE (BT_INTCONST, integer_type_node, 1)
DEF_TYPE (BT_LONG, long_integer_type_node, 0)
DEF_TYPE (BT_LONGLONG, long_long_integer_type_node, 0)
@@ -70,6 +71,7 @@ DEF_TYPE (BT_UCHAR, unsigned_char_type_node, 0)
DEF_TYPE (BT_UCHARCONST, unsigned_char_type_node, 1)
DEF_TYPE (BT_UINT, unsigned_type_node, 0)
DEF_TYPE (BT_UINT128, unsigned_intTI_type_node, 0)
+DEF_TYPE (BT_UINT128CONST, unsigned_intTI_type_node, 1)
DEF_TYPE (BT_UINT64, c_uint64_type_node, 0)
DEF_TYPE (BT_UINTCONST, unsigned_type_node, 1)
DEF_TYPE (BT_ULONG, long_unsigned_type_node, 0)
@@ -80,10 +82,12 @@ DEF_TYPE (BT_USHORTCONST, short_unsigned_type_node, 1)
DEF_TYPE (BT_VOID, void_type_node, 0)
DEF_TYPE (BT_VOIDCONST, void_type_node, 1)
DEF_VECTOR_TYPE (BT_UV16QI, BT_UCHAR, 16)
+DEF_VECTOR_TYPE (BT_UV1TI, BT_UINT128, 1)
DEF_VECTOR_TYPE (BT_UV2DI, BT_ULONGLONG, 2)
DEF_VECTOR_TYPE (BT_UV4SI, BT_UINT, 4)
DEF_VECTOR_TYPE (BT_UV8HI, BT_USHORT, 8)
DEF_VECTOR_TYPE (BT_V16QI, BT_SCHAR, 16)
+DEF_VECTOR_TYPE (BT_V1TI, BT_INT128, 1)
DEF_VECTOR_TYPE (BT_V2DF, BT_DBL, 2)
DEF_VECTOR_TYPE (BT_V2DI, BT_LONGLONG, 2)
DEF_VECTOR_TYPE (BT_V4SF, BT_FLT, 4)
@@ -93,6 +97,8 @@ DEF_POINTER_TYPE (BT_DBLCONSTPTR, BT_DBLCONST)
DEF_POINTER_TYPE (BT_DBLPTR, BT_DBL)
DEF_POINTER_TYPE (BT_FLTCONSTPTR, BT_FLTCONST)
DEF_POINTER_TYPE (BT_FLTPTR, BT_FLT)
+DEF_POINTER_TYPE (BT_INT128CONSTPTR, BT_INT128CONST)
+DEF_POINTER_TYPE (BT_INT128PTR, BT_INT128)
DEF_POINTER_TYPE (BT_INTCONSTPTR, BT_INTCONST)
DEF_POINTER_TYPE (BT_INTPTR, BT_INT)
DEF_POINTER_TYPE (BT_LONGLONGCONSTPTR, BT_LONGLONGCONST)
@@ -103,6 +109,8 @@ DEF_POINTER_TYPE (BT_SHORTCONSTPTR, BT_SHORTCONST)
DEF_POINTER_TYPE (BT_SHORTPTR, BT_SHORT)
DEF_POINTER_TYPE (BT_UCHARCONSTPTR, BT_UCHARCONST)
DEF_POINTER_TYPE (BT_UCHARPTR, BT_UCHAR)
+DEF_POINTER_TYPE (BT_UINT128CONSTPTR, BT_UINT128CONST)
+DEF_POINTER_TYPE (BT_UINT128PTR, BT_UINT128)
DEF_POINTER_TYPE (BT_UINT64PTR, BT_UINT64)
DEF_POINTER_TYPE (BT_UINTCONSTPTR, BT_UINTCONST)
DEF_POINTER_TYPE (BT_UINTPTR, BT_UINT)
@@ -128,12 +136,14 @@ DEF_OPAQUE_VECTOR_TYPE (BT_OV4SI, BT_INT, 4)
DEF_FN_TYPE_0 (BT_FN_INT, BT_INT)
DEF_FN_TYPE_0 (BT_FN_UINT, BT_UINT)
DEF_FN_TYPE_0 (BT_FN_VOID, BT_VOID)
+DEF_FN_TYPE_1 (BT_FN_INT128_V2DI, BT_INT128, BT_V2DI)
DEF_FN_TYPE_1 (BT_FN_INT_INT, BT_INT, BT_INT)
DEF_FN_TYPE_1 (BT_FN_INT_VOIDPTR, BT_INT, BT_VOIDPTR)
DEF_FN_TYPE_1 (BT_FN_OV4SI_INT, BT_OV4SI, BT_INT)
DEF_FN_TYPE_1 (BT_FN_OV4SI_INTCONSTPTR, BT_OV4SI, BT_INTCONSTPTR)
DEF_FN_TYPE_1 (BT_FN_OV4SI_OV4SI, BT_OV4SI, BT_OV4SI)
DEF_FN_TYPE_1 (BT_FN_UINT128_UINT128, BT_UINT128, BT_UINT128)
+DEF_FN_TYPE_1 (BT_FN_UINT128_UV2DI, BT_UINT128, BT_UV2DI)
DEF_FN_TYPE_1 (BT_FN_UV16QI_UCHAR, BT_UV16QI, BT_UCHAR)
DEF_FN_TYPE_1 (BT_FN_UV16QI_UCHARCONSTPTR, BT_UV16QI, BT_UCHARCONSTPTR)
DEF_FN_TYPE_1 (BT_FN_UV16QI_USHORT, BT_UV16QI, BT_USHORT)
@@ -187,6 +197,7 @@ DEF_FN_TYPE_1 (BT_FN_VOID_UINT, BT_VOID, BT_UINT)
DEF_FN_TYPE_2 (BT_FN_DBL_V2DF_INT, BT_DBL, BT_V2DF, BT_INT)
DEF_FN_TYPE_2 (BT_FN_FLT_V4SF_INT, BT_FLT, BT_V4SF, BT_INT)
DEF_FN_TYPE_2 (BT_FN_INT128_INT128_INT128, BT_INT128, BT_INT128, BT_INT128)
+DEF_FN_TYPE_2 (BT_FN_INT128_V2DI_V2DI, BT_INT128, BT_V2DI, BT_V2DI)
DEF_FN_TYPE_2 (BT_FN_INT_OV4SI_INT, BT_INT, BT_OV4SI, BT_INT)
DEF_FN_TYPE_2 (BT_FN_INT_OV4SI_OV4SI, BT_INT, BT_OV4SI, BT_OV4SI)
DEF_FN_TYPE_2 (BT_FN_INT_UV16QI_UV16QI, BT_INT, BT_UV16QI, BT_UV16QI)
@@ -226,6 +237,7 @@ DEF_FN_TYPE_2 (BT_FN_UV16QI_UV8HI_UV8HI, BT_UV16QI, BT_UV8HI, BT_UV8HI)
DEF_FN_TYPE_2 (BT_FN_UV2DI_UCHAR_UCHAR, BT_UV2DI, BT_UCHAR, BT_UCHAR)
DEF_FN_TYPE_2 (BT_FN_UV2DI_ULONGLONG_INT, BT_UV2DI, BT_ULONGLONG, BT_INT)
DEF_FN_TYPE_2 (BT_FN_UV2DI_UV16QI_UV16QI, BT_UV2DI, BT_UV16QI, BT_UV16QI)
+DEF_FN_TYPE_2 (BT_FN_UV2DI_UV1TI_UV16QI, BT_UV2DI, BT_UV1TI, BT_UV16QI)
DEF_FN_TYPE_2 (BT_FN_UV2DI_UV2DI_UCHAR, BT_UV2DI, BT_UV2DI, BT_UCHAR)
DEF_FN_TYPE_2 (BT_FN_UV2DI_UV2DI_UV2DI, BT_UV2DI, BT_UV2DI, BT_UV2DI)
DEF_FN_TYPE_2 (BT_FN_UV2DI_UV4SI_UV4SI, BT_UV2DI, BT_UV4SI, BT_UV4SI)
@@ -285,6 +297,8 @@ DEF_FN_TYPE_2 (BT_FN_VOID_UINT64PTR_UINT64, BT_VOID, BT_UINT64PTR, BT_UINT64)
DEF_FN_TYPE_2 (BT_FN_VOID_V2DF_FLTPTR, BT_VOID, BT_V2DF, BT_FLTPTR)
DEF_FN_TYPE_3 (BT_FN_BV2DI_V2DF_USHORT_INTPTR, BT_BV2DI, BT_V2DF, BT_USHORT, BT_INTPTR)
DEF_FN_TYPE_3 (BT_FN_BV4SI_V4SF_USHORT_INTPTR, BT_BV4SI, BT_V4SF, BT_USHORT, BT_INTPTR)
+DEF_FN_TYPE_3 (BT_FN_INT128_INT128_INT128_INT128, BT_INT128, BT_INT128, BT_INT128, BT_INT128)
+DEF_FN_TYPE_3 (BT_FN_INT128_V2DI_V2DI_INT128, BT_INT128, BT_V2DI, BT_V2DI, BT_INT128)
DEF_FN_TYPE_3 (BT_FN_INT_OV4SI_OV4SI_INTPTR, BT_INT, BT_OV4SI, BT_OV4SI, BT_INTPTR)
DEF_FN_TYPE_3 (BT_FN_OV4SI_INT_OV4SI_INT, BT_OV4SI, BT_INT, BT_OV4SI, BT_INT)
DEF_FN_TYPE_3 (BT_FN_OV4SI_OV4SI_INT_INTPTR, BT_OV4SI, BT_OV4SI, BT_INT, BT_INTPTR)
@@ -302,6 +316,7 @@ DEF_FN_TYPE_3 (BT_FN_UV16QI_UV16QI_UV16QI_INTPTR, BT_UV16QI, BT_UV16QI, BT_UV16Q
DEF_FN_TYPE_3 (BT_FN_UV16QI_UV16QI_UV16QI_UV16QI, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_UV16QI)
DEF_FN_TYPE_3 (BT_FN_UV16QI_UV2DI_UV2DI_UV16QI, BT_UV16QI, BT_UV2DI, BT_UV2DI, BT_UV16QI)
DEF_FN_TYPE_3 (BT_FN_UV16QI_UV8HI_UV8HI_INTPTR, BT_UV16QI, BT_UV8HI, BT_UV8HI, BT_INTPTR)
+DEF_FN_TYPE_3 (BT_FN_UV1TI_UV1TI_UV1TI_UV1TI, BT_UV1TI, BT_UV1TI, BT_UV1TI, BT_UV1TI)
DEF_FN_TYPE_3 (BT_FN_UV2DI_UV2DI_ULONGLONG_INT, BT_UV2DI, BT_UV2DI, BT_ULONGLONG, BT_INT)
DEF_FN_TYPE_3 (BT_FN_UV2DI_UV2DI_UV2DI_INT, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_INT)
DEF_FN_TYPE_3 (BT_FN_UV2DI_UV2DI_UV2DI_UV2DI, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_UV2DI)
@@ -333,6 +348,7 @@ DEF_FN_TYPE_3 (BT_FN_V2DI_UV2DI_UV2DI_INTPTR, BT_V2DI, BT_UV2DI, BT_UV2DI, BT_IN
DEF_FN_TYPE_3 (BT_FN_V2DI_V2DF_INT_INTPTR, BT_V2DI, BT_V2DF, BT_INT, BT_INTPTR)
DEF_FN_TYPE_3 (BT_FN_V2DI_V2DF_V2DF_INTPTR, BT_V2DI, BT_V2DF, BT_V2DF, BT_INTPTR)
DEF_FN_TYPE_3 (BT_FN_V2DI_V2DI_V2DI_INTPTR, BT_V2DI, BT_V2DI, BT_V2DI, BT_INTPTR)
+DEF_FN_TYPE_3 (BT_FN_V2DI_V2DI_V2DI_V2DI, BT_V2DI, BT_V2DI, BT_V2DI, BT_V2DI)
DEF_FN_TYPE_3 (BT_FN_V2DI_V4SI_V4SI_V2DI, BT_V2DI, BT_V4SI, BT_V4SI, BT_V2DI)
DEF_FN_TYPE_3 (BT_FN_V4SF_V2DF_INT_INT, BT_V4SF, BT_V2DF, BT_INT, BT_INT)
DEF_FN_TYPE_3 (BT_FN_V4SF_V4SF_FLT_INT, BT_V4SF, BT_V4SF, BT_FLT, BT_INT)
@@ -364,6 +380,7 @@ DEF_FN_TYPE_4 (BT_FN_UV16QI_UV16QI_UV16QI_UV16QI_INTPTR, BT_UV16QI, BT_UV16QI, B
DEF_FN_TYPE_4 (BT_FN_UV16QI_UV2DI_UV2DI_UV16QI_INT, BT_UV16QI, BT_UV2DI, BT_UV2DI, BT_UV16QI, BT_INT)
DEF_FN_TYPE_4 (BT_FN_UV16QI_UV4SI_UV4SI_UV16QI_INTPTR, BT_UV16QI, BT_UV4SI, BT_UV4SI, BT_UV16QI, BT_INTPTR)
DEF_FN_TYPE_4 (BT_FN_UV16QI_UV8HI_UV8HI_UV16QI_INTPTR, BT_UV16QI, BT_UV8HI, BT_UV8HI, BT_UV16QI, BT_INTPTR)
+DEF_FN_TYPE_4 (BT_FN_UV1TI_UV2DI_UV2DI_UV1TI_INT, BT_UV1TI, BT_UV2DI, BT_UV2DI, BT_UV1TI, BT_INT)
DEF_FN_TYPE_4 (BT_FN_UV2DI_UV2DI_UV2DI_ULONGLONGCONSTPTR_UCHAR, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_ULONGLONGCONSTPTR, BT_UCHAR)
DEF_FN_TYPE_4 (BT_FN_UV2DI_UV2DI_UV2DI_UV2DI_INT, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_INT)
DEF_FN_TYPE_4 (BT_FN_UV4SI_UV4SI_UV4SI_INT_INTPTR, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_INT, BT_INTPTR)
@@ -395,6 +412,12 @@ DEF_OV_TYPE (BT_OV_BV16QI_UV16QI_UV16QI_UV16QI, BT_BV16QI, BT_UV16QI, BT_UV16QI,
DEF_OV_TYPE (BT_OV_BV16QI_UV16QI_UV16QI_UV16QI_INTPTR, BT_BV16QI, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_INTPTR)
DEF_OV_TYPE (BT_OV_BV16QI_V16QI_V16QI, BT_BV16QI, BT_V16QI, BT_V16QI)
DEF_OV_TYPE (BT_OV_BV16QI_V16QI_V16QI_INTPTR, BT_BV16QI, BT_V16QI, BT_V16QI, BT_INTPTR)
+DEF_OV_TYPE (BT_OV_BV1TI_BV1TI_BV1TI, BT_BV1TI, BT_BV1TI, BT_BV1TI)
+DEF_OV_TYPE (BT_OV_BV1TI_BV1TI_BV1TI_BV1TI, BT_BV1TI, BT_BV1TI, BT_BV1TI, BT_BV1TI)
+DEF_OV_TYPE (BT_OV_BV1TI_BV1TI_BV1TI_UV16QI, BT_BV1TI, BT_BV1TI, BT_BV1TI, BT_UV16QI)
+DEF_OV_TYPE (BT_OV_BV1TI_BV1TI_BV1TI_UV1TI, BT_BV1TI, BT_BV1TI, BT_BV1TI, BT_UV1TI)
+DEF_OV_TYPE (BT_OV_BV1TI_BV2DI, BT_BV1TI, BT_BV2DI)
+DEF_OV_TYPE (BT_OV_BV2DI_BV1TI_BV1TI, BT_BV2DI, BT_BV1TI, BT_BV1TI)
DEF_OV_TYPE (BT_OV_BV2DI_BV2DI, BT_BV2DI, BT_BV2DI)
DEF_OV_TYPE (BT_OV_BV2DI_BV2DI_BV2DI, BT_BV2DI, BT_BV2DI, BT_BV2DI)
DEF_OV_TYPE (BT_OV_BV2DI_BV2DI_BV2DI_BV2DI, BT_BV2DI, BT_BV2DI, BT_BV2DI, BT_BV2DI)
@@ -471,6 +494,7 @@ DEF_OV_TYPE (BT_OV_INT_BV8HI_UV8HI, BT_INT, BT_BV8HI, BT_UV8HI)
DEF_OV_TYPE (BT_OV_INT_BV8HI_V8HI, BT_INT, BT_BV8HI, BT_V8HI)
DEF_OV_TYPE (BT_OV_INT_UV16QI_BV16QI, BT_INT, BT_UV16QI, BT_BV16QI)
DEF_OV_TYPE (BT_OV_INT_UV16QI_UV16QI, BT_INT, BT_UV16QI, BT_UV16QI)
+DEF_OV_TYPE (BT_OV_INT_UV1TI_UV1TI, BT_INT, BT_UV1TI, BT_UV1TI)
DEF_OV_TYPE (BT_OV_INT_UV2DI_BV2DI, BT_INT, BT_UV2DI, BT_BV2DI)
DEF_OV_TYPE (BT_OV_INT_UV2DI_UV2DI, BT_INT, BT_UV2DI, BT_UV2DI)
DEF_OV_TYPE (BT_OV_INT_UV4SI_BV4SI, BT_INT, BT_UV4SI, BT_BV4SI)
@@ -480,6 +504,7 @@ DEF_OV_TYPE (BT_OV_INT_UV8HI_UV8HI, BT_INT, BT_UV8HI, BT_UV8HI)
DEF_OV_TYPE (BT_OV_INT_V16QI_BV16QI, BT_INT, BT_V16QI, BT_BV16QI)
DEF_OV_TYPE (BT_OV_INT_V16QI_UV16QI, BT_INT, BT_V16QI, BT_UV16QI)
DEF_OV_TYPE (BT_OV_INT_V16QI_V16QI, BT_INT, BT_V16QI, BT_V16QI)
+DEF_OV_TYPE (BT_OV_INT_V1TI_UV1TI, BT_INT, BT_V1TI, BT_UV1TI)
DEF_OV_TYPE (BT_OV_INT_V2DF_UV2DI, BT_INT, BT_V2DF, BT_UV2DI)
DEF_OV_TYPE (BT_OV_INT_V2DF_V2DF, BT_INT, BT_V2DF, BT_V2DF)
DEF_OV_TYPE (BT_OV_INT_V2DI_BV2DI, BT_INT, BT_V2DI, BT_BV2DI)
@@ -547,6 +572,18 @@ DEF_OV_TYPE (BT_OV_UV16QI_V16QI_V16QI_UV16QI_INTPTR, BT_UV16QI, BT_V16QI, BT_V16
DEF_OV_TYPE (BT_OV_UV16QI_V4SI_V4SI_UV16QI_INTPTR, BT_UV16QI, BT_V4SI, BT_V4SI, BT_UV16QI, BT_INTPTR)
DEF_OV_TYPE (BT_OV_UV16QI_V8HI_V8HI, BT_UV16QI, BT_V8HI, BT_V8HI)
DEF_OV_TYPE (BT_OV_UV16QI_V8HI_V8HI_UV16QI_INTPTR, BT_UV16QI, BT_V8HI, BT_V8HI, BT_UV16QI, BT_INTPTR)
+DEF_OV_TYPE (BT_OV_UV1TI_LONG_UINT128CONSTPTR, BT_UV1TI, BT_LONG, BT_UINT128CONSTPTR)
+DEF_OV_TYPE (BT_OV_UV1TI_UINT128, BT_UV1TI, BT_UINT128)
+DEF_OV_TYPE (BT_OV_UV1TI_UINT128CONSTPTR_USHORT, BT_UV1TI, BT_UINT128CONSTPTR, BT_USHORT)
+DEF_OV_TYPE (BT_OV_UV1TI_UV1TI, BT_UV1TI, BT_UV1TI)
+DEF_OV_TYPE (BT_OV_UV1TI_UV1TI_UV1TI, BT_UV1TI, BT_UV1TI, BT_UV1TI)
+DEF_OV_TYPE (BT_OV_UV1TI_UV1TI_UV1TI_BV1TI, BT_UV1TI, BT_UV1TI, BT_UV1TI, BT_BV1TI)
+DEF_OV_TYPE (BT_OV_UV1TI_UV1TI_UV1TI_UV16QI, BT_UV1TI, BT_UV1TI, BT_UV1TI, BT_UV16QI)
+DEF_OV_TYPE (BT_OV_UV1TI_UV1TI_UV1TI_UV1TI, BT_UV1TI, BT_UV1TI, BT_UV1TI, BT_UV1TI)
+DEF_OV_TYPE (BT_OV_UV1TI_UV2DI, BT_UV1TI, BT_UV2DI)
+DEF_OV_TYPE (BT_OV_UV1TI_UV2DI_UV2DI, BT_UV1TI, BT_UV2DI, BT_UV2DI)
+DEF_OV_TYPE (BT_OV_UV1TI_UV2DI_UV2DI_UV1TI, BT_UV1TI, BT_UV2DI, BT_UV2DI, BT_UV1TI)
+DEF_OV_TYPE (BT_OV_UV1TI_UV4SI_UV4SI, BT_UV1TI, BT_UV4SI, BT_UV4SI)
DEF_OV_TYPE (BT_OV_UV2DI_BV2DI_UV2DI, BT_UV2DI, BT_BV2DI, BT_UV2DI)
DEF_OV_TYPE (BT_OV_UV2DI_LONG_ULONGLONGCONSTPTR, BT_UV2DI, BT_LONG, BT_ULONGLONGCONSTPTR)
DEF_OV_TYPE (BT_OV_UV2DI_ULONGLONG, BT_UV2DI, BT_ULONGLONG)
@@ -557,6 +594,7 @@ DEF_OV_TYPE (BT_OV_UV2DI_ULONGLONG_BV2DI_INT, BT_UV2DI, BT_ULONGLONG, BT_BV2DI,
DEF_OV_TYPE (BT_OV_UV2DI_ULONGLONG_INT, BT_UV2DI, BT_ULONGLONG, BT_INT)
DEF_OV_TYPE (BT_OV_UV2DI_ULONGLONG_ULONGLONG, BT_UV2DI, BT_ULONGLONG, BT_ULONGLONG)
DEF_OV_TYPE (BT_OV_UV2DI_ULONGLONG_UV2DI_INT, BT_UV2DI, BT_ULONGLONG, BT_UV2DI, BT_INT)
+DEF_OV_TYPE (BT_OV_UV2DI_UV1TI_UV1TI, BT_UV2DI, BT_UV1TI, BT_UV1TI)
DEF_OV_TYPE (BT_OV_UV2DI_UV2DI, BT_UV2DI, BT_UV2DI)
DEF_OV_TYPE (BT_OV_UV2DI_UV2DI_BV2DI, BT_UV2DI, BT_UV2DI, BT_BV2DI)
DEF_OV_TYPE (BT_OV_UV2DI_UV2DI_UCHAR, BT_UV2DI, BT_UV2DI, BT_UCHAR)
@@ -684,6 +722,20 @@ DEF_OV_TYPE (BT_OV_V16QI_V16QI_V16QI_UV16QI, BT_V16QI, BT_V16QI, BT_V16QI, BT_UV
DEF_OV_TYPE (BT_OV_V16QI_V16QI_V16QI_V16QI, BT_V16QI, BT_V16QI, BT_V16QI, BT_V16QI)
DEF_OV_TYPE (BT_OV_V16QI_V8HI_V8HI, BT_V16QI, BT_V8HI, BT_V8HI)
DEF_OV_TYPE (BT_OV_V16QI_V8HI_V8HI_INTPTR, BT_V16QI, BT_V8HI, BT_V8HI, BT_INTPTR)
+DEF_OV_TYPE (BT_OV_V1TI_INT128, BT_V1TI, BT_INT128)
+DEF_OV_TYPE (BT_OV_V1TI_INT128CONSTPTR_USHORT, BT_V1TI, BT_INT128CONSTPTR, BT_USHORT)
+DEF_OV_TYPE (BT_OV_V1TI_LONG_INT128CONSTPTR, BT_V1TI, BT_LONG, BT_INT128CONSTPTR)
+DEF_OV_TYPE (BT_OV_V1TI_UV1TI_V1TI_V1TI, BT_V1TI, BT_UV1TI, BT_V1TI, BT_V1TI)
+DEF_OV_TYPE (BT_OV_V1TI_V1TI, BT_V1TI, BT_V1TI)
+DEF_OV_TYPE (BT_OV_V1TI_V1TI_UV1TI_UV1TI, BT_V1TI, BT_V1TI, BT_UV1TI, BT_UV1TI)
+DEF_OV_TYPE (BT_OV_V1TI_V1TI_V1TI, BT_V1TI, BT_V1TI, BT_V1TI)
+DEF_OV_TYPE (BT_OV_V1TI_V1TI_V1TI_BV1TI, BT_V1TI, BT_V1TI, BT_V1TI, BT_BV1TI)
+DEF_OV_TYPE (BT_OV_V1TI_V1TI_V1TI_UV16QI, BT_V1TI, BT_V1TI, BT_V1TI, BT_UV16QI)
+DEF_OV_TYPE (BT_OV_V1TI_V1TI_V1TI_UV1TI, BT_V1TI, BT_V1TI, BT_V1TI, BT_UV1TI)
+DEF_OV_TYPE (BT_OV_V1TI_V1TI_V1TI_V1TI, BT_V1TI, BT_V1TI, BT_V1TI, BT_V1TI)
+DEF_OV_TYPE (BT_OV_V1TI_V2DI, BT_V1TI, BT_V2DI)
+DEF_OV_TYPE (BT_OV_V1TI_V2DI_V2DI, BT_V1TI, BT_V2DI, BT_V2DI)
+DEF_OV_TYPE (BT_OV_V1TI_V2DI_V2DI_V1TI, BT_V1TI, BT_V2DI, BT_V2DI, BT_V1TI)
DEF_OV_TYPE (BT_OV_V2DF_BV2DI_V2DF, BT_V2DF, BT_BV2DI, BT_V2DF)
DEF_OV_TYPE (BT_OV_V2DF_DBL, BT_V2DF, BT_DBL)
DEF_OV_TYPE (BT_OV_V2DF_DBLCONSTPTR, BT_V2DF, BT_DBLCONSTPTR)
@@ -720,7 +772,9 @@ DEF_OV_TYPE (BT_OV_V2DI_LONGLONG_INT, BT_V2DI, BT_LONGLONG, BT_INT)
DEF_OV_TYPE (BT_OV_V2DI_LONGLONG_LONGLONG, BT_V2DI, BT_LONGLONG, BT_LONGLONG)
DEF_OV_TYPE (BT_OV_V2DI_LONGLONG_V2DI_INT, BT_V2DI, BT_LONGLONG, BT_V2DI, BT_INT)
DEF_OV_TYPE (BT_OV_V2DI_LONG_LONGLONGCONSTPTR, BT_V2DI, BT_LONG, BT_LONGLONGCONSTPTR)
+DEF_OV_TYPE (BT_OV_V2DI_UV2DI_V2DI_V2DI, BT_V2DI, BT_UV2DI, BT_V2DI, BT_V2DI)
DEF_OV_TYPE (BT_OV_V2DI_V16QI, BT_V2DI, BT_V16QI)
+DEF_OV_TYPE (BT_OV_V2DI_V1TI_V1TI, BT_V2DI, BT_V1TI, BT_V1TI)
DEF_OV_TYPE (BT_OV_V2DI_V2DF, BT_V2DI, BT_V2DF)
DEF_OV_TYPE (BT_OV_V2DI_V2DI, BT_V2DI, BT_V2DI)
DEF_OV_TYPE (BT_OV_V2DI_V2DI_BV2DI, BT_V2DI, BT_V2DI, BT_BV2DI)
@@ -730,6 +784,7 @@ DEF_OV_TYPE (BT_OV_V2DI_V2DI_UV16QI, BT_V2DI, BT_V2DI, BT_UV16QI)
DEF_OV_TYPE (BT_OV_V2DI_V2DI_UV2DI, BT_V2DI, BT_V2DI, BT_UV2DI)
DEF_OV_TYPE (BT_OV_V2DI_V2DI_UV2DI_LONGLONGCONSTPTR_UCHAR, BT_V2DI, BT_V2DI, BT_UV2DI, BT_LONGLONGCONSTPTR, BT_UCHAR)
DEF_OV_TYPE (BT_OV_V2DI_V2DI_UV2DI_UCHAR, BT_V2DI, BT_V2DI, BT_UV2DI, BT_UCHAR)
+DEF_OV_TYPE (BT_OV_V2DI_V2DI_UV2DI_UV2DI, BT_V2DI, BT_V2DI, BT_UV2DI, BT_UV2DI)
DEF_OV_TYPE (BT_OV_V2DI_V2DI_UV4SI, BT_V2DI, BT_V2DI, BT_UV4SI)
DEF_OV_TYPE (BT_OV_V2DI_V2DI_UV8HI, BT_V2DI, BT_V2DI, BT_UV8HI)
DEF_OV_TYPE (BT_OV_V2DI_V2DI_V2DI, BT_V2DI, BT_V2DI, BT_V2DI)
@@ -739,6 +794,7 @@ DEF_OV_TYPE (BT_OV_V2DI_V2DI_V2DI_UINT, BT_V2DI, BT_V2DI, BT_V2DI, BT_UINT)
DEF_OV_TYPE (BT_OV_V2DI_V2DI_V2DI_ULONGLONG, BT_V2DI, BT_V2DI, BT_V2DI, BT_ULONGLONG)
DEF_OV_TYPE (BT_OV_V2DI_V2DI_V2DI_UV16QI, BT_V2DI, BT_V2DI, BT_V2DI, BT_UV16QI)
DEF_OV_TYPE (BT_OV_V2DI_V2DI_V2DI_UV2DI, BT_V2DI, BT_V2DI, BT_V2DI, BT_UV2DI)
+DEF_OV_TYPE (BT_OV_V2DI_V2DI_V2DI_V2DI, BT_V2DI, BT_V2DI, BT_V2DI, BT_V2DI)
DEF_OV_TYPE (BT_OV_V2DI_V4SI, BT_V2DI, BT_V4SI)
DEF_OV_TYPE (BT_OV_V2DI_V4SI_V4SI, BT_V2DI, BT_V4SI, BT_V4SI)
DEF_OV_TYPE (BT_OV_V2DI_V4SI_V4SI_V2DI, BT_V2DI, BT_V4SI, BT_V4SI, BT_V2DI)
@@ -839,6 +895,7 @@ DEF_OV_TYPE (BT_OV_VOID_BV2DI_UV2DI_ULONGLONGPTR_ULONGLONG, BT_VOID, BT_BV2DI, B
DEF_OV_TYPE (BT_OV_VOID_BV4SI_UV4SI_UINTPTR_ULONGLONG, BT_VOID, BT_BV4SI, BT_UV4SI, BT_UINTPTR, BT_ULONGLONG)
DEF_OV_TYPE (BT_OV_VOID_UV16QI_LONG_UCHARPTR, BT_VOID, BT_UV16QI, BT_LONG, BT_UCHARPTR)
DEF_OV_TYPE (BT_OV_VOID_UV16QI_UCHARPTR_UINT, BT_VOID, BT_UV16QI, BT_UCHARPTR, BT_UINT)
+DEF_OV_TYPE (BT_OV_VOID_UV1TI_LONG_UINT128PTR, BT_VOID, BT_UV1TI, BT_LONG, BT_UINT128PTR)
DEF_OV_TYPE (BT_OV_VOID_UV2DI_LONG_ULONGLONGPTR, BT_VOID, BT_UV2DI, BT_LONG, BT_ULONGLONGPTR)
DEF_OV_TYPE (BT_OV_VOID_UV2DI_ULONGLONGPTR_UINT, BT_VOID, BT_UV2DI, BT_ULONGLONGPTR, BT_UINT)
DEF_OV_TYPE (BT_OV_VOID_UV2DI_UV2DI_ULONGLONGPTR_ULONGLONG, BT_VOID, BT_UV2DI, BT_UV2DI, BT_ULONGLONGPTR, BT_ULONGLONG)
@@ -849,6 +906,7 @@ DEF_OV_TYPE (BT_OV_VOID_UV8HI_LONG_USHORTPTR, BT_VOID, BT_UV8HI, BT_LONG, BT_USH
DEF_OV_TYPE (BT_OV_VOID_UV8HI_USHORTPTR_UINT, BT_VOID, BT_UV8HI, BT_USHORTPTR, BT_UINT)
DEF_OV_TYPE (BT_OV_VOID_V16QI_LONG_SCHARPTR, BT_VOID, BT_V16QI, BT_LONG, BT_SCHARPTR)
DEF_OV_TYPE (BT_OV_VOID_V16QI_SCHARPTR_UINT, BT_VOID, BT_V16QI, BT_SCHARPTR, BT_UINT)
+DEF_OV_TYPE (BT_OV_VOID_V1TI_LONG_INT128PTR, BT_VOID, BT_V1TI, BT_LONG, BT_INT128PTR)
DEF_OV_TYPE (BT_OV_VOID_V2DF_DBLPTR_UINT, BT_VOID, BT_V2DF, BT_DBLPTR, BT_UINT)
DEF_OV_TYPE (BT_OV_VOID_V2DF_LONG_DBLPTR, BT_VOID, BT_V2DF, BT_LONG, BT_DBLPTR)
DEF_OV_TYPE (BT_OV_VOID_V2DF_UV2DI_DBLPTR_ULONGLONG, BT_VOID, BT_V2DF, BT_UV2DI, BT_DBLPTR, BT_ULONGLONG)
diff --git a/gcc/config/s390/s390-builtins.def b/gcc/config/s390/s390-builtins.def
index 1700016..b8e8b64 100644
--- a/gcc/config/s390/s390-builtins.def
+++ b/gcc/config/s390/s390-builtins.def
@@ -358,6 +358,8 @@ OB_DEF_VAR (s390_vec_xl_s32, MAX, 0,
OB_DEF_VAR (s390_vec_xl_u32, MAX, 0, O1_LIT, BT_OV_UV4SI_LONG_UINTCONSTPTR) /* vl */
OB_DEF_VAR (s390_vec_xl_s64, MAX, 0, O1_LIT, BT_OV_V2DI_LONG_LONGLONGCONSTPTR) /* vl */
OB_DEF_VAR (s390_vec_xl_u64, MAX, 0, O1_LIT, BT_OV_UV2DI_LONG_ULONGLONGCONSTPTR) /* vl */
+OB_DEF_VAR (s390_vec_xl_s128, MAX, 0, O1_LIT, BT_OV_V1TI_LONG_INT128CONSTPTR) /* vl */
+OB_DEF_VAR (s390_vec_xl_u128, MAX, 0, O1_LIT, BT_OV_UV1TI_LONG_UINT128CONSTPTR) /* vl */
OB_DEF_VAR (s390_vec_xl_flt, MAX, 0, O1_LIT, BT_OV_V4SF_LONG_FLTCONSTPTR) /* vl */
OB_DEF_VAR (s390_vec_xl_dbl, MAX, 0, O1_LIT, BT_OV_V2DF_LONG_DBLCONSTPTR) /* vl */
@@ -391,6 +393,8 @@ OB_DEF_VAR (s390_vec_splats_s32, s390_vlrepf, 0,
OB_DEF_VAR (s390_vec_splats_u32, s390_vlrepf, 0, 0, BT_OV_UV4SI_UINT)
OB_DEF_VAR (s390_vec_splats_s64, s390_vlrepg, 0, 0, BT_OV_V2DI_LONGLONG)
OB_DEF_VAR (s390_vec_splats_u64, s390_vlrepg, 0, 0, BT_OV_UV2DI_ULONGLONG)
+OB_DEF_VAR (s390_vec_splats_s128, s390_vlrepq_emu, 0, 0, BT_OV_V1TI_INT128)
+OB_DEF_VAR (s390_vec_splats_u128, s390_vlrepq_emu, 0, 0, BT_OV_UV1TI_UINT128)
OB_DEF_VAR (s390_vec_splats_flt, s390_vlrepf_flt, B_VXE, 0, BT_OV_V4SF_FLT) /* vlrepf */
OB_DEF_VAR (s390_vec_splats_dbl, s390_vlrepg_dbl, 0, 0, BT_OV_V2DF_DBL) /* vlrepg */
@@ -400,6 +404,7 @@ B_DEF (s390_vlrepf, vec_splatsv4si, 0,
B_DEF (s390_vlrepf_flt, vec_splatsv4sf, 0, B_INT | B_VXE, 0, BT_FN_V4SF_FLT)
B_DEF (s390_vlrepg, vec_splatsv2di, 0, B_VX, 0, BT_FN_UV2DI_ULONGLONG)
B_DEF (s390_vlrepg_dbl, vec_splatsv2df, 0, B_INT | B_VX, 0, BT_FN_V2DF_DBL)
+B_DEF (s390_vlrepq_emu, movti, 0, B_VX, 0, BT_FN_UINT128_UINT128)
B_DEF (s390_vrepib, vec_splatsv16qi, 0, B_VX, O1_U8, BT_FN_V16QI_UCHAR)
B_DEF (s390_vrepih, vec_splatsv8hi, 0, B_VX, O1_S16, BT_FN_V8HI_SHORT)
B_DEF (s390_vrepif, vec_splatsv4si, 0, B_VX, O1_S16, BT_FN_V4SI_SHORT)
@@ -509,6 +514,8 @@ OB_DEF_VAR (s390_vec_load_bndry_s32, s390_vlbb, 0,
OB_DEF_VAR (s390_vec_load_bndry_u32, s390_vlbb, 0, O2_U16, BT_OV_UV4SI_UINTCONSTPTR_USHORT)
OB_DEF_VAR (s390_vec_load_bndry_s64, s390_vlbb, 0, O2_U16, BT_OV_V2DI_LONGLONGCONSTPTR_USHORT)
OB_DEF_VAR (s390_vec_load_bndry_u64, s390_vlbb, 0, O2_U16, BT_OV_UV2DI_ULONGLONGCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_s128, s390_vlbb, 0, O2_U16, BT_OV_V1TI_INT128CONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_u128, s390_vlbb, 0, O2_U16, BT_OV_UV1TI_UINT128CONSTPTR_USHORT)
OB_DEF_VAR (s390_vec_load_bndry_flt, s390_vlbb, B_VXE, O2_U16, BT_OV_V4SF_FLTCONSTPTR_USHORT)
OB_DEF_VAR (s390_vec_load_bndry_dbl, s390_vlbb, 0, O2_U16, BT_OV_V2DF_DBLCONSTPTR_USHORT)
@@ -580,7 +587,7 @@ B_DEF (s390_vmrlf_flt, vec_mergelv4sf, 0,
B_DEF (s390_vmrlg, vec_mergelv2di, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UV2DI)
B_DEF (s390_vmrlg_dbl, vec_mergelv2df, 0, B_INT | B_VX, 0, BT_FN_V2DF_V2DF_V2DF)
-OB_DEF (s390_vec_pack, s390_vec_pack_s16, s390_vec_pack_b64, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
+OB_DEF (s390_vec_pack, s390_vec_pack_s16, s390_vec_pack_b128, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_pack_s16, s390_vpkh, 0, 0, BT_OV_V16QI_V8HI_V8HI)
OB_DEF_VAR (s390_vec_pack_u16, s390_vpkh, 0, 0, BT_OV_UV16QI_UV8HI_UV8HI)
OB_DEF_VAR (s390_vec_pack_b16, s390_vpkh, 0, 0, BT_OV_BV16QI_BV8HI_BV8HI)
@@ -590,6 +597,9 @@ OB_DEF_VAR (s390_vec_pack_b32, s390_vpkf, 0,
OB_DEF_VAR (s390_vec_pack_s64, s390_vpkg, 0, 0, BT_OV_V4SI_V2DI_V2DI)
OB_DEF_VAR (s390_vec_pack_u64, s390_vpkg, 0, 0, BT_OV_UV4SI_UV2DI_UV2DI)
OB_DEF_VAR (s390_vec_pack_b64, s390_vpkg, 0, 0, BT_OV_BV4SI_BV2DI_BV2DI)
+OB_DEF_VAR (s390_vec_pack_s128, s390_vpkg, 0, 0, BT_OV_V2DI_V1TI_V1TI)
+OB_DEF_VAR (s390_vec_pack_u128, s390_vpkg, 0, 0, BT_OV_UV2DI_UV1TI_UV1TI)
+OB_DEF_VAR (s390_vec_pack_b128, s390_vpkg, 0, 0, BT_OV_BV2DI_BV1TI_BV1TI)
B_DEF (s390_vpkh, vec_packv8hi, 0, B_VX, 0, BT_FN_UV16QI_UV8HI_UV8HI)
B_DEF (s390_vpkf, vec_packv4si, 0, B_VX, 0, BT_FN_UV8HI_UV4SI_UV4SI)
@@ -655,6 +665,9 @@ OB_DEF_VAR (s390_vec_perm_u32, s390_vperm, 0,
OB_DEF_VAR (s390_vec_perm_s64, s390_vperm, 0, 0, BT_OV_V2DI_V2DI_V2DI_UV16QI)
OB_DEF_VAR (s390_vec_perm_b64, s390_vperm, 0, 0, BT_OV_BV2DI_BV2DI_BV2DI_UV16QI)
OB_DEF_VAR (s390_vec_perm_u64, s390_vperm, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI_UV16QI)
+OB_DEF_VAR (s390_vec_perm_s128, s390_vperm, 0, 0, BT_OV_V1TI_V1TI_V1TI_UV16QI)
+OB_DEF_VAR (s390_vec_perm_b128, s390_vperm, 0, 0, BT_OV_BV1TI_BV1TI_BV1TI_UV16QI)
+OB_DEF_VAR (s390_vec_perm_u128, s390_vperm, 0, 0, BT_OV_UV1TI_UV1TI_UV1TI_UV16QI)
OB_DEF_VAR (s390_vec_perm_flt, s390_vperm, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF_UV16QI)
OB_DEF_VAR (s390_vec_perm_dbl, s390_vperm, 0, 0, BT_OV_V2DF_V2DF_V2DF_UV16QI)
@@ -730,6 +743,12 @@ OB_DEF_VAR (s390_vec_sel_s64_a, s390_vselg, 0,
OB_DEF_VAR (s390_vec_sel_s64_b, s390_vselg, 0, 0, BT_OV_V2DI_V2DI_V2DI_BV2DI)
OB_DEF_VAR (s390_vec_sel_u64_a, s390_vselg, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI_UV2DI)
OB_DEF_VAR (s390_vec_sel_u64_b, s390_vselg, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI_BV2DI)
+OB_DEF_VAR (s390_vec_sel_b128_a, s390_vselq, 0, 0, BT_OV_BV1TI_BV1TI_BV1TI_UV1TI)
+OB_DEF_VAR (s390_vec_sel_b128_b, s390_vselq, 0, 0, BT_OV_BV1TI_BV1TI_BV1TI_BV1TI)
+OB_DEF_VAR (s390_vec_sel_s128_a, s390_vselq, 0, 0, BT_OV_V1TI_V1TI_V1TI_UV1TI)
+OB_DEF_VAR (s390_vec_sel_s128_b, s390_vselq, 0, 0, BT_OV_V1TI_V1TI_V1TI_BV1TI)
+OB_DEF_VAR (s390_vec_sel_u128_a, s390_vselq, 0, 0, BT_OV_UV1TI_UV1TI_UV1TI_UV1TI)
+OB_DEF_VAR (s390_vec_sel_u128_b, s390_vselq, 0, 0, BT_OV_UV1TI_UV1TI_UV1TI_BV1TI)
OB_DEF_VAR (s390_vec_sel_flt_a, s390_vself_flt, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF_UV4SI)
OB_DEF_VAR (s390_vec_sel_flt_b, s390_vself_flt, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF_BV4SI)
OB_DEF_VAR (s390_vec_sel_dbl_a, s390_vselg_dbl, 0, 0, BT_OV_V2DF_V2DF_V2DF_UV2DI)
@@ -739,6 +758,7 @@ B_DEF (s390_vselb, vselv16qi, 0,
B_DEF (s390_vselh, vselv8hi, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UV8HI_UV8HI)
B_DEF (s390_vself, vselv4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI_UV4SI)
B_DEF (s390_vselg, vselv2di, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UV2DI_UV2DI)
+B_DEF (s390_vselq, vselv1ti, 0, B_VX, 0, BT_FN_UV1TI_UV1TI_UV1TI_UV1TI)
B_DEF (s390_vself_flt, vselv4sf, 0, B_VXE, 0, BT_FN_V4SF_V4SF_V4SF_UV4SI)
B_DEF (s390_vselg_dbl, vselv2df, 0, B_VX, 0, BT_FN_V2DF_V2DF_V2DF_UV2DI)
@@ -760,6 +780,8 @@ OB_DEF_VAR (s390_vec_xst_s32, MAX, 0,
OB_DEF_VAR (s390_vec_xst_u32, MAX, 0, O2_LIT, BT_OV_VOID_UV4SI_LONG_UINTPTR) /* vst */
OB_DEF_VAR (s390_vec_xst_s64, MAX, 0, O2_LIT, BT_OV_VOID_V2DI_LONG_LONGLONGPTR) /* vst */
OB_DEF_VAR (s390_vec_xst_u64, MAX, 0, O2_LIT, BT_OV_VOID_UV2DI_LONG_ULONGLONGPTR) /* vst */
+OB_DEF_VAR (s390_vec_xst_s128, MAX, 0, O2_LIT, BT_OV_VOID_V1TI_LONG_INT128PTR) /* vst */
+OB_DEF_VAR (s390_vec_xst_u128, MAX, 0, O2_LIT, BT_OV_VOID_UV1TI_LONG_UINT128PTR) /* vst */
OB_DEF_VAR (s390_vec_xst_flt, MAX, 0, O2_LIT, BT_OV_VOID_V4SF_LONG_FLTPTR) /* vst */
OB_DEF_VAR (s390_vec_xst_dbl, MAX, 0, O2_LIT, BT_OV_VOID_V2DF_LONG_DBLPTR) /* vst */
@@ -798,10 +820,11 @@ OB_DEF_VAR (s390_vec_store_len_dbl, s390_vstl, 0,
B_DEF (s390_vstl, vstlv16qi, 0, B_VX, 0, BT_FN_VOID_V16QI_UINT_VOIDPTR)
B_DEF (s390_vstrlr, vstrlrv16qi, 0, B_VXE, 0, BT_FN_VOID_V16QI_UINT_VOIDPTR)
-B_DEF (s390_vec_bperm_u128, vbpermv16qi, 0, B_VXE, 0, BT_FN_UV2DI_UV16QI_UV16QI) /* vbperm */
-B_DEF (s390_vbperm, vbpermv16qi, 0, B_VXE, 0, BT_FN_UV2DI_UV16QI_UV16QI)
+B_DEF (s390_vec_bperm_u128, vbpermv16qi, 0, B_DEP | B_VXE, 0, BT_FN_UV2DI_UV16QI_UV16QI)
+B_DEF (s390_vec_bperm, vbpermv16qi, 0, B_VXE, 0, BT_FN_UV2DI_UV1TI_UV16QI) /* vbperm */
+B_DEF (s390_vbperm, vbpermv16qi, 0, B_VXE, 0, BT_FN_UV2DI_UV16QI_UV16QI) /* vbperm */
-OB_DEF (s390_vec_unpackh, s390_vec_unpackh_s8,s390_vec_unpackh_u32,B_VX, BT_FN_OV4SI_OV4SI)
+OB_DEF (s390_vec_unpackh, s390_vec_unpackh_s8,s390_vec_unpackh_u64,B_VX, BT_FN_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_unpackh_s8, s390_vuphb, 0, 0, BT_OV_V8HI_V16QI)
OB_DEF_VAR (s390_vec_unpackh_b8, s390_vuphb, 0, 0, BT_OV_BV8HI_BV16QI)
OB_DEF_VAR (s390_vec_unpackh_u8, s390_vuplhb, 0, 0, BT_OV_UV8HI_UV16QI)
@@ -811,6 +834,9 @@ OB_DEF_VAR (s390_vec_unpackh_u16, s390_vuplhh, 0,
OB_DEF_VAR (s390_vec_unpackh_s32, s390_vuphf, 0, 0, BT_OV_V2DI_V4SI)
OB_DEF_VAR (s390_vec_unpackh_b32, s390_vuphf, 0, 0, BT_OV_BV2DI_BV4SI)
OB_DEF_VAR (s390_vec_unpackh_u32, s390_vuplhf, 0, 0, BT_OV_UV2DI_UV4SI)
+OB_DEF_VAR (s390_vec_unpackh_s64, s390_vuphg, B_VXE3, 0, BT_OV_V1TI_V2DI)
+OB_DEF_VAR (s390_vec_unpackh_b64, s390_vuphg, B_VXE3, 0, BT_OV_BV1TI_BV2DI)
+OB_DEF_VAR (s390_vec_unpackh_u64, s390_vuplhg, B_VXE3, 0, BT_OV_UV1TI_UV2DI)
B_DEF (s390_vuphb, vec_unpackhv16qi, 0, B_VX, 0, BT_FN_V8HI_V16QI)
B_DEF (s390_vuplhb, vec_unpackh_lv16qi, 0, B_VX, 0, BT_FN_UV8HI_UV16QI)
@@ -818,8 +844,10 @@ B_DEF (s390_vuphh, vec_unpackhv8hi, 0,
B_DEF (s390_vuplhh, vec_unpackh_lv8hi, 0, B_VX, 0, BT_FN_UV4SI_UV8HI)
B_DEF (s390_vuphf, vec_unpackhv4si, 0, B_VX, 0, BT_FN_V2DI_V4SI)
B_DEF (s390_vuplhf, vec_unpackh_lv4si, 0, B_VX, 0, BT_FN_UV2DI_UV4SI)
+B_DEF (s390_vuphg, vec_unpackhv2di, 0, B_VXE3, 0, BT_FN_INT128_V2DI)
+B_DEF (s390_vuplhg, vec_unpackh_lv2di, 0, B_VXE3, 0, BT_FN_UINT128_UV2DI)
-OB_DEF (s390_vec_unpackl, s390_vec_unpackl_s8,s390_vec_unpackl_u32,B_VX, BT_FN_OV4SI_OV4SI)
+OB_DEF (s390_vec_unpackl, s390_vec_unpackl_s8,s390_vec_unpackl_u64,B_VX, BT_FN_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_unpackl_s8, s390_vuplb, 0, 0, BT_OV_V8HI_V16QI)
OB_DEF_VAR (s390_vec_unpackl_b8, s390_vuplb, 0, 0, BT_OV_BV8HI_BV16QI)
OB_DEF_VAR (s390_vec_unpackl_u8, s390_vupllb, 0, 0, BT_OV_UV8HI_UV16QI)
@@ -829,6 +857,9 @@ OB_DEF_VAR (s390_vec_unpackl_u16, s390_vupllh, 0,
OB_DEF_VAR (s390_vec_unpackl_s32, s390_vuplf, 0, 0, BT_OV_V2DI_V4SI)
OB_DEF_VAR (s390_vec_unpackl_b32, s390_vuplf, 0, 0, BT_OV_BV2DI_BV4SI)
OB_DEF_VAR (s390_vec_unpackl_u32, s390_vupllf, 0, 0, BT_OV_UV2DI_UV4SI)
+OB_DEF_VAR (s390_vec_unpackl_s64, s390_vuplg, B_VXE3, 0, BT_OV_V1TI_V2DI)
+OB_DEF_VAR (s390_vec_unpackl_b64, s390_vuplg, B_VXE3, 0, BT_OV_BV1TI_BV2DI)
+OB_DEF_VAR (s390_vec_unpackl_u64, s390_vupllg, B_VXE3, 0, BT_OV_UV1TI_UV2DI)
B_DEF (s390_vuplb, vec_unpacklv16qi, 0, B_VX, 0, BT_FN_V8HI_V16QI)
B_DEF (s390_vupllb, vec_unpackl_lv16qi, 0, B_VX, 0, BT_FN_UV8HI_UV16QI)
@@ -836,22 +867,29 @@ B_DEF (s390_vuplhw, vec_unpacklv8hi, 0,
B_DEF (s390_vupllh, vec_unpackl_lv8hi, 0, B_VX, 0, BT_FN_UV4SI_UV8HI)
B_DEF (s390_vuplf, vec_unpacklv4si, 0, B_VX, 0, BT_FN_V2DI_V4SI)
B_DEF (s390_vupllf, vec_unpackl_lv4si, 0, B_VX, 0, BT_FN_UV2DI_UV4SI)
+B_DEF (s390_vuplg, vec_unpacklv2di, 0, B_VXE3, 0, BT_FN_INT128_V2DI)
+B_DEF (s390_vupllg, vec_unpackl_lv2di, 0, B_VXE3, 0, BT_FN_UINT128_UV2DI)
-OB_DEF (s390_vec_addc, s390_vec_addc_u8, s390_vec_addc_u64, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
+OB_DEF (s390_vec_addc, s390_vec_addc_u8, s390_vec_addc_u128, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_addc_u8, s390_vaccb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI)
OB_DEF_VAR (s390_vec_addc_u16, s390_vacch, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI)
OB_DEF_VAR (s390_vec_addc_u32, s390_vaccf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI)
OB_DEF_VAR (s390_vec_addc_u64, s390_vaccg, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI)
+OB_DEF_VAR (s390_vec_addc_u128, s390_vaccq, 0, 0, BT_OV_UV1TI_UV1TI_UV1TI)
+
+B_DEF (s390_vec_adde, vacq, 0, B_VX, 0, BT_FN_UV1TI_UV1TI_UV1TI_UV1TI)
+
+B_DEF (s390_vec_addec, vacccq, 0, B_VX, 0, BT_FN_UV1TI_UV1TI_UV1TI_UV1TI)
B_DEF (s390_vaccb, vaccb_v16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
B_DEF (s390_vacch, vacch_v8hi, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UV8HI)
B_DEF (s390_vaccf, vaccf_v4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI)
B_DEF (s390_vaccg, vaccg_v2di, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UV2DI)
-B_DEF (s390_vec_add_u128, addti3, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
-B_DEF (s390_vec_addc_u128, vaccq_ti, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
-B_DEF (s390_vec_adde_u128, vacq, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
-B_DEF (s390_vec_addec_u128, vacccq, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
+B_DEF (s390_vec_add_u128, addti3, 0, B_DEP | B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
+B_DEF (s390_vec_addc_u128, vaccq_ti, 0, B_DEP | B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
+B_DEF (s390_vec_adde_u128, vacq, 0, B_DEP | B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
+B_DEF (s390_vec_addec_u128, vacccq, 0, B_DEP | B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
B_DEF (s390_vaq, addti3, 0, B_VX, 0, BT_FN_INT128_INT128_INT128)
B_DEF (s390_vaccq, vaccq_ti, 0, B_VX, 0, BT_FN_UINT128_UINT128_UINT128)
@@ -887,6 +925,9 @@ OB_DEF_VAR (s390_vec_and_s64_c, s390_vn, B_DEP,
OB_DEF_VAR (s390_vec_and_u64_a, s390_vn, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI)
OB_DEF_VAR (s390_vec_and_u64_b, s390_vn, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI)
OB_DEF_VAR (s390_vec_and_u64_c, s390_vn, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI)
+OB_DEF_VAR (s390_vec_and_b128, s390_vn, 0, 0, BT_OV_BV1TI_BV1TI_BV1TI)
+OB_DEF_VAR (s390_vec_and_s128, s390_vn, 0, 0, BT_OV_V1TI_V1TI_V1TI)
+OB_DEF_VAR (s390_vec_and_u128, s390_vn, 0, 0, BT_OV_UV1TI_UV1TI_UV1TI)
OB_DEF_VAR (s390_vec_and_flt_a, s390_vn, B_VXE | B_DEP, 0, BT_OV_V4SF_BV4SI_V4SF)
OB_DEF_VAR (s390_vec_and_flt_b, s390_vn, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF)
OB_DEF_VAR (s390_vec_and_flt_c, s390_vn, B_VXE | B_DEP, 0, BT_OV_V4SF_V4SF_BV4SI)
@@ -925,6 +966,9 @@ OB_DEF_VAR (s390_vec_andc_s64_c, s390_vnc, B_DEP,
OB_DEF_VAR (s390_vec_andc_u64_a, s390_vnc, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI)
OB_DEF_VAR (s390_vec_andc_u64_b, s390_vnc, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI)
OB_DEF_VAR (s390_vec_andc_u64_c, s390_vnc, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI)
+OB_DEF_VAR (s390_vec_andc_b128, s390_vnc, 0, 0, BT_OV_BV1TI_BV1TI_BV1TI)
+OB_DEF_VAR (s390_vec_andc_s128, s390_vnc, 0, 0, BT_OV_V1TI_V1TI_V1TI)
+OB_DEF_VAR (s390_vec_andc_u128, s390_vnc, 0, 0, BT_OV_UV1TI_UV1TI_UV1TI)
OB_DEF_VAR (s390_vec_andc_flt_a, s390_vnc, B_VXE | B_DEP, 0, BT_OV_V4SF_BV4SI_V4SF)
OB_DEF_VAR (s390_vec_andc_flt_b, s390_vnc, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF)
OB_DEF_VAR (s390_vec_andc_flt_c, s390_vnc, B_VXE | B_DEP, 0, BT_OV_V4SF_V4SF_BV4SI)
@@ -934,7 +978,7 @@ OB_DEF_VAR (s390_vec_andc_dbl_c, s390_vnc, B_DEP,
B_DEF (s390_vnc, vec_andcv16qi3, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
-OB_DEF (s390_vec_avg, s390_vec_avg_s8, s390_vec_avg_u64, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
+OB_DEF (s390_vec_avg, s390_vec_avg_s8, s390_vec_avg_u128, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_avg_s8, s390_vavgb, 0, 0, BT_OV_V16QI_V16QI_V16QI)
OB_DEF_VAR (s390_vec_avg_u8, s390_vavglb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI)
OB_DEF_VAR (s390_vec_avg_s16, s390_vavgh, 0, 0, BT_OV_V8HI_V8HI_V8HI)
@@ -943,6 +987,8 @@ OB_DEF_VAR (s390_vec_avg_s32, s390_vavgf, 0,
OB_DEF_VAR (s390_vec_avg_u32, s390_vavglf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI)
OB_DEF_VAR (s390_vec_avg_s64, s390_vavgg, 0, 0, BT_OV_V2DI_V2DI_V2DI)
OB_DEF_VAR (s390_vec_avg_u64, s390_vavglg, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI)
+OB_DEF_VAR (s390_vec_avg_s128, s390_vavgq, B_VXE3, 0, BT_OV_V1TI_V1TI_V1TI)
+OB_DEF_VAR (s390_vec_avg_u128, s390_vavglq, B_VXE3, 0, BT_OV_UV1TI_UV1TI_UV1TI)
B_DEF (s390_vavgb, vec_avgv16qi, 0, B_VX, 0, BT_FN_V16QI_V16QI_V16QI)
B_DEF (s390_vavglb, vec_avguv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
@@ -952,6 +998,8 @@ B_DEF (s390_vavgf, vec_avgv4si, 0,
B_DEF (s390_vavglf, vec_avguv4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI)
B_DEF (s390_vavgg, vec_avgv2di, 0, B_VX, 0, BT_FN_V2DI_V2DI_V2DI)
B_DEF (s390_vavglg, vec_avguv2di, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UV2DI)
+B_DEF (s390_vavgq, vec_avgti, 0, B_VXE3, 0, BT_FN_INT128_INT128_INT128)
+B_DEF (s390_vavglq, vec_avguti, 0, B_VXE3, 0, BT_FN_UINT128_UINT128_UINT128)
B_DEF (s390_vcksm, vec_checksum, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI)
@@ -1650,6 +1698,9 @@ OB_DEF_VAR (s390_vec_xor_s64_c, s390_vx, B_DEP,
OB_DEF_VAR (s390_vec_xor_u64_a, s390_vx, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI)
OB_DEF_VAR (s390_vec_xor_u64_b, s390_vx, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI)
OB_DEF_VAR (s390_vec_xor_u64_c, s390_vx, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI)
+OB_DEF_VAR (s390_vec_xor_b128, s390_vx, 0, 0, BT_OV_BV1TI_BV1TI_BV1TI)
+OB_DEF_VAR (s390_vec_xor_s128, s390_vx, 0, 0, BT_OV_V1TI_V1TI_V1TI)
+OB_DEF_VAR (s390_vec_xor_u128, s390_vx, 0, 0, BT_OV_UV1TI_UV1TI_UV1TI)
OB_DEF_VAR (s390_vec_xor_flt_a, s390_vx, B_VXE | B_DEP, 0, BT_OV_V4SF_BV4SI_V4SF)
OB_DEF_VAR (s390_vec_xor_flt_b, s390_vx, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF)
OB_DEF_VAR (s390_vec_xor_flt_c, s390_vx, B_VXE | B_DEP, 0, BT_OV_V4SF_V4SF_BV4SI)
@@ -1659,10 +1710,11 @@ OB_DEF_VAR (s390_vec_xor_dbl_c, s390_vx, B_DEP,
B_DEF (s390_vx, xorv16qi3, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
-OB_DEF (s390_vec_gfmsum, s390_vec_gfmsum_u8, s390_vec_gfmsum_u32,B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
+OB_DEF (s390_vec_gfmsum, s390_vec_gfmsum_u8, s390_vec_gfmsum_u64,B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_gfmsum_u8, s390_vgfmb, 0, 0, BT_OV_UV8HI_UV16QI_UV16QI)
OB_DEF_VAR (s390_vec_gfmsum_u16, s390_vgfmh, 0, 0, BT_OV_UV4SI_UV8HI_UV8HI)
OB_DEF_VAR (s390_vec_gfmsum_u32, s390_vgfmf, 0, 0, BT_OV_UV2DI_UV4SI_UV4SI)
+OB_DEF_VAR (s390_vec_gfmsum_u64, s390_vgfmg, 0, 0, BT_OV_UV1TI_UV2DI_UV2DI)
B_DEF (s390_vgfmb, vec_gfmsumv16qi, 0, B_VX, 0, BT_FN_UV8HI_UV16QI_UV16QI)
B_DEF (s390_vgfmh, vec_gfmsumv8hi, 0, B_VX, 0, BT_FN_UV4SI_UV8HI_UV8HI)
@@ -1670,10 +1722,13 @@ B_DEF (s390_vgfmf, vec_gfmsumv4si, 0,
B_DEF (s390_vgfmg, vec_gfmsum_128, 0, B_VX, 0, BT_FN_UINT128_UV2DI_UV2DI)
B_DEF (s390_vgfmg_128, vec_gfmsum_128, 0, B_VX, 0, BT_FN_UV16QI_UV2DI_UV2DI)
-OB_DEF (s390_vec_gfmsum_accum, s390_vec_gfmsum_accum_u8,s390_vec_gfmsum_accum_u32,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI)
+B_DEF (s390_vec_gfmsum_128, vec_gfmsum_128, 0, B_DEP | B_VX, 0, BT_FN_UV16QI_UV2DI_UV2DI)
+
+OB_DEF (s390_vec_gfmsum_accum, s390_vec_gfmsum_accum_u8,s390_vec_gfmsum_accum_u64,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_gfmsum_accum_u8, s390_vgfmab, 0, 0, BT_OV_UV8HI_UV16QI_UV16QI_UV8HI)
OB_DEF_VAR (s390_vec_gfmsum_accum_u16, s390_vgfmah, 0, 0, BT_OV_UV4SI_UV8HI_UV8HI_UV4SI)
OB_DEF_VAR (s390_vec_gfmsum_accum_u32, s390_vgfmaf, 0, 0, BT_OV_UV2DI_UV4SI_UV4SI_UV2DI)
+OB_DEF_VAR (s390_vec_gfmsum_accum_u64, s390_vgfmag, 0, 0, BT_OV_UV1TI_UV2DI_UV2DI_UV1TI)
B_DEF (s390_vgfmab, vec_gfmsum_accumv16qi,0, B_VX, 0, BT_FN_UV8HI_UV16QI_UV16QI_UV8HI)
B_DEF (s390_vgfmah, vec_gfmsum_accumv8hi,0, B_VX, 0, BT_FN_UV4SI_UV8HI_UV8HI_UV4SI)
@@ -1681,6 +1736,8 @@ B_DEF (s390_vgfmaf, vec_gfmsum_accumv4si,0,
B_DEF (s390_vgfmag, vec_gfmsum_accum_128,0, B_VX, 0, BT_FN_UINT128_UV2DI_UV2DI_UINT128)
B_DEF (s390_vgfmag_128, vec_gfmsum_accum_128,0, B_VX, 0, BT_FN_UV16QI_UV2DI_UV2DI_UV16QI)
+B_DEF (s390_vec_gfmsum_accum_128, vec_gfmsum_accum_128,0, B_DEP | B_VX, 0, BT_FN_UV16QI_UV2DI_UV2DI_UV16QI)
+
OB_DEF (s390_vec_abs, s390_vec_abs_s8, s390_vec_abs_dbl, B_VX, BT_FN_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_abs_s8, s390_vlpb, 0, 0, BT_OV_V16QI_V16QI)
OB_DEF_VAR (s390_vec_abs_s16, s390_vlph, 0, 0, BT_OV_V8HI_V8HI)
@@ -1778,7 +1835,7 @@ B_DEF (s390_vfmindb, vfminv2df, 0,
B_DEF (s390_vfminsb_4, sminv4sf3, 0, B_INT | B_VXE, 0, BT_FN_V4SF_V4SF_V4SF) /* vfminsb */
B_DEF (s390_vfmindb_4, sminv2df3, 0, B_INT | B_VX, 0, BT_FN_V2DF_V2DF_V2DF) /* vfmindb */
-OB_DEF (s390_vec_mladd, s390_vec_mladd_u8, s390_vec_mladd_s32_c,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI)
+OB_DEF (s390_vec_mladd, s390_vec_mladd_u8, s390_vec_mladd_s128_c,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_mladd_u8, s390_vmalb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI)
OB_DEF_VAR (s390_vec_mladd_s8_a, s390_vmalb, 0, 0, BT_OV_V16QI_UV16QI_V16QI_V16QI)
OB_DEF_VAR (s390_vec_mladd_s8_b, s390_vmalb, 0, 0, BT_OV_V16QI_V16QI_UV16QI_UV16QI)
@@ -1791,18 +1848,32 @@ OB_DEF_VAR (s390_vec_mladd_u32, s390_vmalf, 0,
OB_DEF_VAR (s390_vec_mladd_s32_a, s390_vmalf, 0, 0, BT_OV_V4SI_UV4SI_V4SI_V4SI)
OB_DEF_VAR (s390_vec_mladd_s32_b, s390_vmalf, 0, 0, BT_OV_V4SI_V4SI_UV4SI_UV4SI)
OB_DEF_VAR (s390_vec_mladd_s32_c, s390_vmalf, 0, 0, BT_OV_V4SI_V4SI_V4SI_V4SI)
+OB_DEF_VAR (s390_vec_mladd_u64, s390_vmalg, B_VXE3, 0, BT_OV_UV2DI_UV2DI_UV2DI_UV2DI)
+OB_DEF_VAR (s390_vec_mladd_s64_a, s390_vmalg, B_VXE3, 0, BT_OV_V2DI_UV2DI_V2DI_V2DI)
+OB_DEF_VAR (s390_vec_mladd_s64_b, s390_vmalg, B_VXE3, 0, BT_OV_V2DI_V2DI_UV2DI_UV2DI)
+OB_DEF_VAR (s390_vec_mladd_s64_c, s390_vmalg, B_VXE3, 0, BT_OV_V2DI_V2DI_V2DI_V2DI)
+OB_DEF_VAR (s390_vec_mladd_u128, s390_vmalq, B_VXE3, 0, BT_OV_UV1TI_UV1TI_UV1TI_UV1TI)
+OB_DEF_VAR (s390_vec_mladd_s128_a, s390_vmalq, B_VXE3, 0, BT_OV_V1TI_UV1TI_V1TI_V1TI)
+OB_DEF_VAR (s390_vec_mladd_s128_b, s390_vmalq, B_VXE3, 0, BT_OV_V1TI_V1TI_UV1TI_UV1TI)
+OB_DEF_VAR (s390_vec_mladd_s128_c, s390_vmalq, B_VXE3, 0, BT_OV_V1TI_V1TI_V1TI_V1TI)
B_DEF (s390_vmalb, vec_vmalv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
B_DEF (s390_vmalhw, vec_vmalv8hi, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UV8HI_UV8HI)
B_DEF (s390_vmalf, vec_vmalv4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI_UV4SI)
+B_DEF (s390_vmalg, vec_vmalv2di, 0, B_VXE3, 0, BT_FN_UV2DI_UV2DI_UV2DI_UV2DI)
+B_DEF (s390_vmalq, vec_vmalti, 0, B_VXE3, 0, BT_FN_UINT128_UINT128_UINT128_UINT128)
-OB_DEF (s390_vec_mhadd, s390_vec_mhadd_u8, s390_vec_mhadd_s32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI)
+OB_DEF (s390_vec_mhadd, s390_vec_mhadd_u8, s390_vec_mhadd_s128,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_mhadd_u8, s390_vmalhb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI)
OB_DEF_VAR (s390_vec_mhadd_s8, s390_vmahb, 0, 0, BT_OV_V16QI_V16QI_V16QI_V16QI)
OB_DEF_VAR (s390_vec_mhadd_u16, s390_vmalhh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI)
OB_DEF_VAR (s390_vec_mhadd_s16, s390_vmahh, 0, 0, BT_OV_V8HI_V8HI_V8HI_V8HI)
OB_DEF_VAR (s390_vec_mhadd_u32, s390_vmalhf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI)
OB_DEF_VAR (s390_vec_mhadd_s32, s390_vmahf, 0, 0, BT_OV_V4SI_V4SI_V4SI_V4SI)
+OB_DEF_VAR (s390_vec_mhadd_u64, s390_vmalhg, B_VXE3, 0, BT_OV_UV2DI_UV2DI_UV2DI_UV2DI)
+OB_DEF_VAR (s390_vec_mhadd_s64, s390_vmahg, B_VXE3, 0, BT_OV_V2DI_V2DI_V2DI_V2DI)
+OB_DEF_VAR (s390_vec_mhadd_u128, s390_vmalhq, B_VXE3, 0, BT_OV_UV1TI_UV1TI_UV1TI_UV1TI)
+OB_DEF_VAR (s390_vec_mhadd_s128, s390_vmahq, B_VXE3, 0, BT_OV_V1TI_V1TI_V1TI_V1TI)
B_DEF (s390_vmalhb, vec_vmalhv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
B_DEF (s390_vmahb, vec_vmahv16qi, 0, B_VX, 0, BT_FN_V16QI_V16QI_V16QI_V16QI)
@@ -1810,14 +1881,20 @@ B_DEF (s390_vmalhh, vec_vmalhv8hi, 0,
B_DEF (s390_vmahh, vec_vmahv8hi, 0, B_VX, 0, BT_FN_V8HI_V8HI_V8HI_V8HI)
B_DEF (s390_vmalhf, vec_vmalhv4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI_UV4SI)
B_DEF (s390_vmahf, vec_vmahv4si, 0, B_VX, 0, BT_FN_V4SI_V4SI_V4SI_V4SI)
+B_DEF (s390_vmalhg, vec_vmalhv2di, 0, B_VXE3, 0, BT_FN_UV2DI_UV2DI_UV2DI_UV2DI)
+B_DEF (s390_vmahg, vec_vmahv2di, 0, B_VXE3, 0, BT_FN_V2DI_V2DI_V2DI_V2DI)
+B_DEF (s390_vmalhq, vec_vmalhti, 0, B_VXE3, 0, BT_FN_UINT128_UINT128_UINT128_UINT128)
+B_DEF (s390_vmahq, vec_vmahti, 0, B_VXE3, 0, BT_FN_INT128_INT128_INT128_INT128)
-OB_DEF (s390_vec_meadd, s390_vec_meadd_u8, s390_vec_meadd_s32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI)
+OB_DEF (s390_vec_meadd, s390_vec_meadd_u8, s390_vec_meadd_s64, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_meadd_u8, s390_vmaleb, 0, 0, BT_OV_UV8HI_UV16QI_UV16QI_UV8HI)
OB_DEF_VAR (s390_vec_meadd_s8, s390_vmaeb, 0, 0, BT_OV_V8HI_V16QI_V16QI_V8HI)
OB_DEF_VAR (s390_vec_meadd_u16, s390_vmaleh, 0, 0, BT_OV_UV4SI_UV8HI_UV8HI_UV4SI)
OB_DEF_VAR (s390_vec_meadd_s16, s390_vmaeh, 0, 0, BT_OV_V4SI_V8HI_V8HI_V4SI)
OB_DEF_VAR (s390_vec_meadd_u32, s390_vmalef, 0, 0, BT_OV_UV2DI_UV4SI_UV4SI_UV2DI)
OB_DEF_VAR (s390_vec_meadd_s32, s390_vmaef, 0, 0, BT_OV_V2DI_V4SI_V4SI_V2DI)
+OB_DEF_VAR (s390_vec_meadd_u64, s390_vmaleg, B_VXE3, 0, BT_OV_UV1TI_UV2DI_UV2DI_UV1TI)
+OB_DEF_VAR (s390_vec_meadd_s64, s390_vmaeg, B_VXE3, 0, BT_OV_V1TI_V2DI_V2DI_V1TI)
B_DEF (s390_vmaleb, vec_vmalev16qi, 0, B_VX, 0, BT_FN_UV8HI_UV16QI_UV16QI_UV8HI)
B_DEF (s390_vmaeb, vec_vmaev16qi, 0, B_VX, 0, BT_FN_V8HI_V16QI_V16QI_V8HI)
@@ -1825,14 +1902,18 @@ B_DEF (s390_vmaleh, vec_vmalev8hi, 0,
B_DEF (s390_vmaeh, vec_vmaev8hi, 0, B_VX, 0, BT_FN_V4SI_V8HI_V8HI_V4SI)
B_DEF (s390_vmalef, vec_vmalev4si, 0, B_VX, 0, BT_FN_UV2DI_UV4SI_UV4SI_UV2DI)
B_DEF (s390_vmaef, vec_vmaev4si, 0, B_VX, 0, BT_FN_V2DI_V4SI_V4SI_V2DI)
+B_DEF (s390_vmaleg, vec_vmalev2di, 0, B_VXE3, 0, BT_FN_UINT128_UV2DI_UV2DI_UINT128)
+B_DEF (s390_vmaeg, vec_vmaev2di, 0, B_VXE3, 0, BT_FN_INT128_V2DI_V2DI_INT128)
-OB_DEF (s390_vec_moadd, s390_vec_moadd_u8, s390_vec_moadd_s32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI)
+OB_DEF (s390_vec_moadd, s390_vec_moadd_u8, s390_vec_moadd_s64, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_moadd_u8, s390_vmalob, 0, 0, BT_OV_UV8HI_UV16QI_UV16QI_UV8HI)
OB_DEF_VAR (s390_vec_moadd_s8, s390_vmaob, 0, 0, BT_OV_V8HI_V16QI_V16QI_V8HI)
OB_DEF_VAR (s390_vec_moadd_u16, s390_vmaloh, 0, 0, BT_OV_UV4SI_UV8HI_UV8HI_UV4SI)
OB_DEF_VAR (s390_vec_moadd_s16, s390_vmaoh, 0, 0, BT_OV_V4SI_V8HI_V8HI_V4SI)
OB_DEF_VAR (s390_vec_moadd_u32, s390_vmalof, 0, 0, BT_OV_UV2DI_UV4SI_UV4SI_UV2DI)
OB_DEF_VAR (s390_vec_moadd_s32, s390_vmaof, 0, 0, BT_OV_V2DI_V4SI_V4SI_V2DI)
+OB_DEF_VAR (s390_vec_moadd_u64, s390_vmalog, B_VXE3, 0, BT_OV_UV1TI_UV2DI_UV2DI_UV1TI)
+OB_DEF_VAR (s390_vec_moadd_s64, s390_vmaog, B_VXE3, 0, BT_OV_V1TI_V2DI_V2DI_V1TI)
B_DEF (s390_vmalob, vec_vmalov16qi, 0, B_VX, 0, BT_FN_UV8HI_UV16QI_UV16QI_UV8HI)
B_DEF (s390_vmaob, vec_vmaov16qi, 0, B_VX, 0, BT_FN_V8HI_V16QI_V16QI_V8HI)
@@ -1840,14 +1921,20 @@ B_DEF (s390_vmaloh, vec_vmalov8hi, 0,
B_DEF (s390_vmaoh, vec_vmaov8hi, 0, B_VX, 0, BT_FN_V4SI_V8HI_V8HI_V4SI)
B_DEF (s390_vmalof, vec_vmalov4si, 0, B_VX, 0, BT_FN_UV2DI_UV4SI_UV4SI_UV2DI)
B_DEF (s390_vmaof, vec_vmaov4si, 0, B_VX, 0, BT_FN_V2DI_V4SI_V4SI_V2DI)
+B_DEF (s390_vmalog, vec_vmalov2di, 0, B_VXE3, 0, BT_FN_UINT128_UV2DI_UV2DI_UINT128)
+B_DEF (s390_vmaog, vec_vmaov2di, 0, B_VXE3, 0, BT_FN_INT128_V2DI_V2DI_INT128)
-OB_DEF (s390_vec_mulh, s390_vec_mulh_u8, s390_vec_mulh_s32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
+OB_DEF (s390_vec_mulh, s390_vec_mulh_u8, s390_vec_mulh_s128, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_mulh_u8, s390_vmlhb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI)
OB_DEF_VAR (s390_vec_mulh_s8, s390_vmhb, 0, 0, BT_OV_V16QI_V16QI_V16QI)
OB_DEF_VAR (s390_vec_mulh_u16, s390_vmlhh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI)
OB_DEF_VAR (s390_vec_mulh_s16, s390_vmhh, 0, 0, BT_OV_V8HI_V8HI_V8HI)
OB_DEF_VAR (s390_vec_mulh_u32, s390_vmlhf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI)
OB_DEF_VAR (s390_vec_mulh_s32, s390_vmhf, 0, 0, BT_OV_V4SI_V4SI_V4SI)
+OB_DEF_VAR (s390_vec_mulh_u64, s390_vmlhg, B_VXE3, 0, BT_OV_UV2DI_UV2DI_UV2DI)
+OB_DEF_VAR (s390_vec_mulh_s64, s390_vmhg, B_VXE3, 0, BT_OV_V2DI_V2DI_V2DI)
+OB_DEF_VAR (s390_vec_mulh_u128, s390_vmlhq, B_VXE3, 0, BT_OV_UV1TI_UV1TI_UV1TI)
+OB_DEF_VAR (s390_vec_mulh_s128, s390_vmhq, B_VXE3, 0, BT_OV_V1TI_V1TI_V1TI)
B_DEF (s390_vmlhb, vec_umulhv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
B_DEF (s390_vmhb, vec_smulhv16qi, 0, B_VX, 0, BT_FN_V16QI_V16QI_V16QI)
@@ -1855,14 +1942,20 @@ B_DEF (s390_vmlhh, vec_umulhv8hi, 0,
B_DEF (s390_vmhh, vec_smulhv8hi, 0, B_VX, 0, BT_FN_V8HI_V8HI_V8HI)
B_DEF (s390_vmlhf, vec_umulhv4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI)
B_DEF (s390_vmhf, vec_smulhv4si, 0, B_VX, 0, BT_FN_V4SI_V4SI_V4SI)
+B_DEF (s390_vmlhg, vec_umulhv2di, 0, B_VXE3, 0, BT_FN_UV2DI_UV2DI_UV2DI)
+B_DEF (s390_vmhg, vec_smulhv2di, 0, B_VXE3, 0, BT_FN_V2DI_V2DI_V2DI)
+B_DEF (s390_vmlhq, vec_umulhti, 0, B_VXE3, 0, BT_FN_UINT128_UINT128_UINT128)
+B_DEF (s390_vmhq, vec_smulhti, 0, B_VXE3, 0, BT_FN_INT128_INT128_INT128)
-OB_DEF (s390_vec_mule, s390_vec_mule_u8, s390_vec_mule_s32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
+OB_DEF (s390_vec_mule, s390_vec_mule_u8, s390_vec_mule_s64, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_mule_u8, s390_vmleb, 0, 0, BT_OV_UV8HI_UV16QI_UV16QI)
OB_DEF_VAR (s390_vec_mule_s8, s390_vmeb, 0, 0, BT_OV_V8HI_V16QI_V16QI)
OB_DEF_VAR (s390_vec_mule_u16, s390_vmleh, 0, 0, BT_OV_UV4SI_UV8HI_UV8HI)
OB_DEF_VAR (s390_vec_mule_s15, s390_vmeh, 0, 0, BT_OV_V4SI_V8HI_V8HI)
OB_DEF_VAR (s390_vec_mule_u32, s390_vmlef, 0, 0, BT_OV_UV2DI_UV4SI_UV4SI)
OB_DEF_VAR (s390_vec_mule_s32, s390_vmef, 0, 0, BT_OV_V2DI_V4SI_V4SI)
+OB_DEF_VAR (s390_vec_mule_u64, s390_vmleg, B_VXE3, 0, BT_OV_UV1TI_UV2DI_UV2DI)
+OB_DEF_VAR (s390_vec_mule_s64, s390_vmeg, B_VXE3, 0, BT_OV_V1TI_V2DI_V2DI)
B_DEF (s390_vmleb, vec_widen_umult_even_v16qi,0, B_VX, 0, BT_FN_UV8HI_UV16QI_UV16QI)
B_DEF (s390_vmeb, vec_widen_smult_even_v16qi,0, B_VX, 0, BT_FN_V8HI_V16QI_V16QI)
@@ -1870,14 +1963,18 @@ B_DEF (s390_vmleh, vec_widen_umult_even_v8hi,0,
B_DEF (s390_vmeh, vec_widen_smult_even_v8hi,0, B_VX, 0, BT_FN_V4SI_V8HI_V8HI)
B_DEF (s390_vmlef, vec_widen_umult_even_v4si,0, B_VX, 0, BT_FN_UV2DI_UV4SI_UV4SI)
B_DEF (s390_vmef, vec_widen_smult_even_v4si,0, B_VX, 0, BT_FN_V2DI_V4SI_V4SI)
+B_DEF (s390_vmleg, vec_widen_umult_even_v2di,0, B_VXE3, 0, BT_FN_UINT128_UV2DI_UV2DI)
+B_DEF (s390_vmeg, vec_widen_smult_even_v2di,0, B_VXE3, 0, BT_FN_INT128_V2DI_V2DI)
-OB_DEF (s390_vec_mulo, s390_vec_mulo_u8, s390_vec_mulo_s32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
+OB_DEF (s390_vec_mulo, s390_vec_mulo_u8, s390_vec_mulo_s64, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_mulo_u8, s390_vmlob, 0, 0, BT_OV_UV8HI_UV16QI_UV16QI)
OB_DEF_VAR (s390_vec_mulo_s8, s390_vmob, 0, 0, BT_OV_V8HI_V16QI_V16QI)
OB_DEF_VAR (s390_vec_mulo_u16, s390_vmloh, 0, 0, BT_OV_UV4SI_UV8HI_UV8HI)
OB_DEF_VAR (s390_vec_mulo_s16, s390_vmoh, 0, 0, BT_OV_V4SI_V8HI_V8HI)
OB_DEF_VAR (s390_vec_mulo_u32, s390_vmlof, 0, 0, BT_OV_UV2DI_UV4SI_UV4SI)
OB_DEF_VAR (s390_vec_mulo_s32, s390_vmof, 0, 0, BT_OV_V2DI_V4SI_V4SI)
+OB_DEF_VAR (s390_vec_mulo_u64, s390_vmlog, B_VXE3, 0, BT_OV_UV1TI_UV2DI_UV2DI)
+OB_DEF_VAR (s390_vec_mulo_s64, s390_vmog, B_VXE3, 0, BT_OV_V1TI_V2DI_V2DI)
B_DEF (s390_vmlob, vec_widen_umult_odd_v16qi,0, B_VX, 0, BT_FN_UV8HI_UV16QI_UV16QI)
B_DEF (s390_vmob, vec_widen_smult_odd_v16qi,0, B_VX, 0, BT_FN_V8HI_V16QI_V16QI)
@@ -1885,6 +1982,8 @@ B_DEF (s390_vmloh, vec_widen_umult_odd_v8hi,0,
B_DEF (s390_vmoh, vec_widen_smult_odd_v8hi,0, B_VX, 0, BT_FN_V4SI_V8HI_V8HI)
B_DEF (s390_vmlof, vec_widen_umult_odd_v4si,0, B_VX, 0, BT_FN_UV2DI_UV4SI_UV4SI)
B_DEF (s390_vmof, vec_widen_smult_odd_v4si,0, B_VX, 0, BT_FN_V2DI_V4SI_V4SI)
+B_DEF (s390_vmlog, vec_widen_umult_odd_v2di,0, B_VXE3, 0, BT_FN_UINT128_UV2DI_UV2DI)
+B_DEF (s390_vmog, vec_widen_smult_odd_v2di,0, B_VXE3, 0, BT_FN_INT128_V2DI_V2DI)
OB_DEF (s390_vec_nor, s390_vec_nor_b8, s390_vec_nor_dbl_c, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_nor_b8, s390_vno, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI)
@@ -1915,6 +2014,9 @@ OB_DEF_VAR (s390_vec_nor_s64_c, s390_vno, B_DEP,
OB_DEF_VAR (s390_vec_nor_u64_a, s390_vno, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI)
OB_DEF_VAR (s390_vec_nor_u64_b, s390_vno, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI)
OB_DEF_VAR (s390_vec_nor_u64_c, s390_vno, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI)
+OB_DEF_VAR (s390_vec_nor_b128, s390_vno, 0, 0, BT_OV_BV1TI_BV1TI_BV1TI)
+OB_DEF_VAR (s390_vec_nor_s128, s390_vno, 0, 0, BT_OV_V1TI_V1TI_V1TI)
+OB_DEF_VAR (s390_vec_nor_u128, s390_vno, 0, 0, BT_OV_UV1TI_UV1TI_UV1TI)
OB_DEF_VAR (s390_vec_nor_flt_a, s390_vno, B_VXE | B_DEP, 0, BT_OV_V4SF_BV4SI_V4SF)
OB_DEF_VAR (s390_vec_nor_flt_b, s390_vno, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF)
OB_DEF_VAR (s390_vec_nor_flt_c, s390_vno, B_VXE | B_DEP, 0, BT_OV_V4SF_V4SF_BV4SI)
@@ -1953,6 +2055,9 @@ OB_DEF_VAR (s390_vec_or_s64_c, s390_vo, B_DEP,
OB_DEF_VAR (s390_vec_or_u64_a, s390_vo, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI)
OB_DEF_VAR (s390_vec_or_u64_b, s390_vo, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI)
OB_DEF_VAR (s390_vec_or_u64_c, s390_vo, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI)
+OB_DEF_VAR (s390_vec_or_b128, s390_vo, 0, 0, BT_OV_BV1TI_BV1TI_BV1TI)
+OB_DEF_VAR (s390_vec_or_s128, s390_vo, 0, 0, BT_OV_V1TI_V1TI_V1TI)
+OB_DEF_VAR (s390_vec_or_u128, s390_vo, 0, 0, BT_OV_UV1TI_UV1TI_UV1TI)
OB_DEF_VAR (s390_vec_or_flt_a, s390_vo, B_VXE | B_DEP, 0, BT_OV_V4SF_BV4SI_V4SF)
OB_DEF_VAR (s390_vec_or_flt_b, s390_vo, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF)
OB_DEF_VAR (s390_vec_or_flt_c, s390_vo, B_VXE | B_DEP, 0, BT_OV_V4SF_V4SF_BV4SI)
@@ -2245,26 +2350,31 @@ OB_DEF_VAR (s390_vec_srb_dbl_s64, s390_vsrlb, 0,
B_DEF (s390_vsrlb, vec_srbv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
-OB_DEF (s390_vec_subc, s390_vec_subc_u8, s390_vec_subc_u64, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
+OB_DEF (s390_vec_subc, s390_vec_subc_u8, s390_vec_subc_u128, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_subc_u8, s390_vscbib, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI)
OB_DEF_VAR (s390_vec_subc_u16, s390_vscbih, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI)
OB_DEF_VAR (s390_vec_subc_u32, s390_vscbif, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI)
OB_DEF_VAR (s390_vec_subc_u64, s390_vscbig, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI)
+OB_DEF_VAR (s390_vec_subc_u128, s390_vscbiq, 0, 0, BT_OV_UV1TI_UV1TI_UV1TI)
B_DEF (s390_vscbib, vscbib_v16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
B_DEF (s390_vscbih, vscbih_v8hi, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UV8HI)
B_DEF (s390_vscbif, vscbif_v4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI)
B_DEF (s390_vscbig, vscbig_v2di, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UV2DI)
+B_DEF (s390_vec_sube, vsbiq, 0, B_VX, 0, BT_FN_UV1TI_UV1TI_UV1TI_UV1TI)
+
+B_DEF (s390_vec_subec, vsbcbiq, 0, B_VX, 0, BT_FN_UV1TI_UV1TI_UV1TI_UV1TI)
+
/* The builtin definitions requires these to use vector unsigned char.
But we want the GCC low-level builtins and the insn patterns to
allow int128_t and TImode. So we rely on s390_expand_builtin to
switch modes. */
-B_DEF (s390_vec_sub_u128, subti3, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
-B_DEF (s390_vec_subc_u128, vscbiq_ti, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
-B_DEF (s390_vec_sube_u128, vsbiq, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
-B_DEF (s390_vec_subec_u128, vsbcbiq, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
+B_DEF (s390_vec_sub_u128, subti3, 0, B_DEP | B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
+B_DEF (s390_vec_subc_u128, vscbiq_ti, 0, B_DEP | B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
+B_DEF (s390_vec_sube_u128, vsbiq, 0, B_DEP | B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
+B_DEF (s390_vec_subec_u128, vsbcbiq, 0, B_DEP | B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
B_DEF (s390_vsq, subti3, 0, B_VX, 0, BT_FN_INT128_INT128_INT128)
B_DEF (s390_vscbiq, vscbiq_ti, 0, B_VX, 0, BT_FN_UINT128_UINT128_UINT128)
@@ -2278,10 +2388,14 @@ OB_DEF_VAR (s390_vec_sum2_u32, s390_vsumgf, 0,
B_DEF (s390_vsumgh, vec_sum2v8hi, 0, B_VX, 0, BT_FN_UV2DI_UV8HI_UV8HI)
B_DEF (s390_vsumgf, vec_sum2v4si, 0, B_VX, 0, BT_FN_UV2DI_UV4SI_UV4SI)
-OB_DEF (s390_vec_sum_u128, s390_vec_sum_u128_u32,s390_vec_sum_u128_u64,B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
+OB_DEF (s390_vec_sum_u128, s390_vec_sum_u128_u32,s390_vec_sum_u128_u64,B_DEP | B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_sum_u128_u32, s390_vsumqf, 0, 0, BT_OV_UV16QI_UV4SI_UV4SI)
OB_DEF_VAR (s390_vec_sum_u128_u64, s390_vsumqg, 0, 0, BT_OV_UV16QI_UV2DI_UV2DI)
+OB_DEF (s390_vec_sum, s390_vec_sum_u32,s390_vec_sum_u64, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
+OB_DEF_VAR (s390_vec_sum_u32, s390_vsumqf, 0, 0, BT_OV_UV1TI_UV4SI_UV4SI)
+OB_DEF_VAR (s390_vec_sum_u64, s390_vsumqg, 0, 0, BT_OV_UV1TI_UV2DI_UV2DI)
+
B_DEF (s390_vsumqf, vec_sum_u128v4si, 0, B_VX, 0, BT_FN_UINT128_UV4SI_UV4SI)
B_DEF (s390_vsumqg, vec_sum_u128v2di, 0, B_VX, 0, BT_FN_UINT128_UV2DI_UV2DI)
@@ -2301,12 +2415,15 @@ OB_DEF_VAR (s390_vec_test_mask_s32, s390_vtm, 0,
OB_DEF_VAR (s390_vec_test_mask_u32, s390_vtm, 0, 0, BT_OV_INT_UV4SI_UV4SI)
OB_DEF_VAR (s390_vec_test_mask_s64, s390_vtm, 0, 0, BT_OV_INT_V2DI_UV2DI)
OB_DEF_VAR (s390_vec_test_mask_u64, s390_vtm, 0, 0, BT_OV_INT_UV2DI_UV2DI)
+OB_DEF_VAR (s390_vec_test_mask_s128, s390_vtm, 0, 0, BT_OV_INT_V1TI_UV1TI)
+OB_DEF_VAR (s390_vec_test_mask_u128, s390_vtm, 0, 0, BT_OV_INT_UV1TI_UV1TI)
OB_DEF_VAR (s390_vec_test_mask_flt, s390_vtm, B_VXE, 0, BT_OV_INT_V4SF_UV4SI)
OB_DEF_VAR (s390_vec_test_mask_dbl, s390_vtm, 0, 0, BT_OV_INT_V2DF_UV2DI)
B_DEF (s390_vtm, vec_test_mask_intv16qi,0, B_VX, 0, BT_FN_INT_UV16QI_UV16QI)
-B_DEF (s390_vec_msum_u128, vec_msumv2di, 0, B_VXE, O4_M12, BT_FN_UV16QI_UV2DI_UV2DI_UV16QI_INT)
+B_DEF (s390_vec_msum, vec_msumv2di, 0, B_VXE, O4_M12, BT_FN_UV1TI_UV2DI_UV2DI_UV1TI_INT)
+B_DEF (s390_vec_msum_u128, vec_msumv2di, 0, B_DEP | B_VXE, O4_M12, BT_FN_UV16QI_UV2DI_UV2DI_UV16QI_INT)
B_DEF (s390_vmslg, vmslg, 0, B_VXE, O4_M12, BT_FN_UINT128_UV2DI_UV2DI_UINT128_INT)
OB_DEF (s390_vec_eqv, s390_vec_eqv_b8, s390_vec_eqv_dbl_c, B_VXE, BT_FN_OV4SI_OV4SI_OV4SI)
@@ -2338,6 +2455,9 @@ OB_DEF_VAR (s390_vec_eqv_s64_c, s390_vnx, B_DEP,
OB_DEF_VAR (s390_vec_eqv_u64_a, s390_vnx, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI)
OB_DEF_VAR (s390_vec_eqv_u64_b, s390_vnx, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI)
OB_DEF_VAR (s390_vec_eqv_u64_c, s390_vnx, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI)
+OB_DEF_VAR (s390_vec_eqv_b128, s390_vnx, 0, 0, BT_OV_BV1TI_BV1TI_BV1TI)
+OB_DEF_VAR (s390_vec_eqv_s128, s390_vnx, 0, 0, BT_OV_V1TI_V1TI_V1TI)
+OB_DEF_VAR (s390_vec_eqv_u128, s390_vnx, 0, 0, BT_OV_UV1TI_UV1TI_UV1TI)
OB_DEF_VAR (s390_vec_eqv_flt_a, s390_vnx, B_VXE | B_DEP, 0, BT_OV_V4SF_BV4SI_V4SF)
OB_DEF_VAR (s390_vec_eqv_flt_b, s390_vnx, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF)
OB_DEF_VAR (s390_vec_eqv_flt_c, s390_vnx, B_VXE | B_DEP, 0, BT_OV_V4SF_V4SF_BV4SI)
@@ -2376,6 +2496,9 @@ OB_DEF_VAR (s390_vec_nand_s64_c, s390_vnn, B_DEP,
OB_DEF_VAR (s390_vec_nand_u64_a, s390_vnn, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI)
OB_DEF_VAR (s390_vec_nand_u64_b, s390_vnn, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI)
OB_DEF_VAR (s390_vec_nand_u64_c, s390_vnn, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI)
+OB_DEF_VAR (s390_vec_nand_b128, s390_vnn, 0, 0, BT_OV_BV1TI_BV1TI_BV1TI)
+OB_DEF_VAR (s390_vec_nand_s128, s390_vnn, 0, 0, BT_OV_V1TI_V1TI_V1TI)
+OB_DEF_VAR (s390_vec_nand_u128, s390_vnn, 0, 0, BT_OV_UV1TI_UV1TI_UV1TI)
OB_DEF_VAR (s390_vec_nand_flt_a, s390_vnn, B_DEP, 0, BT_OV_V4SF_BV4SI_V4SF)
OB_DEF_VAR (s390_vec_nand_flt_b, s390_vnn, 0, 0, BT_OV_V4SF_V4SF_V4SF)
OB_DEF_VAR (s390_vec_nand_flt_c, s390_vnn, B_DEP, 0, BT_OV_V4SF_V4SF_BV4SI)
@@ -2414,6 +2537,9 @@ OB_DEF_VAR (s390_vec_orc_s64_c, s390_voc, B_DEP,
OB_DEF_VAR (s390_vec_orc_u64_a, s390_voc, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI)
OB_DEF_VAR (s390_vec_orc_u64_b, s390_voc, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI)
OB_DEF_VAR (s390_vec_orc_u64_c, s390_voc, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI)
+OB_DEF_VAR (s390_vec_orc_b128, s390_voc, 0, 0, BT_OV_BV1TI_BV1TI_BV1TI)
+OB_DEF_VAR (s390_vec_orc_s128, s390_voc, 0, 0, BT_OV_V1TI_V1TI_V1TI)
+OB_DEF_VAR (s390_vec_orc_u128, s390_voc, 0, 0, BT_OV_UV1TI_UV1TI_UV1TI)
OB_DEF_VAR (s390_vec_orc_flt_a, s390_voc, B_DEP, 0, BT_OV_V4SF_BV4SI_V4SF)
OB_DEF_VAR (s390_vec_orc_flt_b, s390_voc, 0, 0, BT_OV_V4SF_V4SF_V4SF)
OB_DEF_VAR (s390_vec_orc_flt_c, s390_voc, B_DEP, 0, BT_OV_V4SF_V4SF_BV4SI)
@@ -2921,6 +3047,8 @@ OB_DEF_VAR (s390_vec_revb_s32, s390_vlbrf, 0,
OB_DEF_VAR (s390_vec_revb_u32, s390_vlbrf, 0, 0, BT_OV_UV4SI_UV4SI)
OB_DEF_VAR (s390_vec_revb_s64, s390_vlbrg, 0, 0, BT_OV_V2DI_V2DI)
OB_DEF_VAR (s390_vec_revb_u64, s390_vlbrg, 0, 0, BT_OV_UV2DI_UV2DI)
+OB_DEF_VAR (s390_vec_revb_s128, s390_vlbrq, 0, 0, BT_OV_V1TI_V1TI)
+OB_DEF_VAR (s390_vec_revb_u128, s390_vlbrq, 0, 0, BT_OV_UV1TI_UV1TI)
OB_DEF_VAR (s390_vec_revb_flt, s390_vlbrf_flt, B_VXE, 0, BT_OV_V4SF_V4SF)
OB_DEF_VAR (s390_vec_revb_dbl, s390_vlbrg_dbl, 0, 0, BT_OV_V2DF_V2DF)
diff --git a/gcc/config/s390/vecintrin.h b/gcc/config/s390/vecintrin.h
index ce422c7..e162169 100644
--- a/gcc/config/s390/vecintrin.h
+++ b/gcc/config/s390/vecintrin.h
@@ -80,6 +80,8 @@ __lcbb(const void *ptr, int bndry)
return __builtin_s390_lcbb (ptr, code);
}
+#define vec_adde __builtin_s390_vec_adde
+#define vec_addec __builtin_s390_vec_addec
#define vec_all_nle(X, Y) vec_all_nge ((Y), (X))
#define vec_all_nlt(X, Y) vec_all_ngt ((Y), (X))
#define vec_any_nle(X, Y) vec_any_nge ((Y), (X))
@@ -97,6 +99,8 @@ __lcbb(const void *ptr, int bndry)
#define vec_splat_s32 __builtin_s390_vec_splat_s32
#define vec_splat_u64 __builtin_s390_vec_splat_u64
#define vec_splat_s64 __builtin_s390_vec_splat_s64
+#define vec_sube __builtin_s390_vec_sube
+#define vec_subec __builtin_s390_vec_subec
#define vec_checksum __builtin_s390_vcksm
#define vec_gfmsum_128 __builtin_s390_vgfmg_128
#define vec_gfmsum_accum_128 __builtin_s390_vgfmag_128
@@ -191,6 +195,7 @@ __lcbb(const void *ptr, int bndry)
#define vec_any_nge __builtin_s390_vec_any_nge
#define vec_any_ngt __builtin_s390_vec_any_ngt
#define vec_avg __builtin_s390_vec_avg
+#define vec_bperm __builtin_s390_vec_bperm
#define vec_bperm_u128 __builtin_s390_vec_bperm_u128
#define vec_cmpeq __builtin_s390_vec_cmpeq
#define vec_cmpeq_idx __builtin_s390_vec_cmpeq_idx
@@ -263,6 +268,7 @@ __lcbb(const void *ptr, int bndry)
#define vec_mladd __builtin_s390_vec_mladd
#define vec_moadd __builtin_s390_vec_moadd
#define vec_msub __builtin_s390_vec_msub
+#define vec_msum __builtin_s390_vec_msum
#define vec_msum_u128 __builtin_s390_vec_msum_u128
#define vec_mule __builtin_s390_vec_mule
#define vec_mulh __builtin_s390_vec_mulh
@@ -313,6 +319,7 @@ __lcbb(const void *ptr, int bndry)
#define vec_subc_u128 __builtin_s390_vec_subc_u128
#define vec_sube_u128 __builtin_s390_vec_sube_u128
#define vec_subec_u128 __builtin_s390_vec_subec_u128
+#define vec_sum __builtin_s390_vec_sum
#define vec_sum2 __builtin_s390_vec_sum2
#define vec_sum4 __builtin_s390_vec_sum4
#define vec_sum_u128 __builtin_s390_vec_sum_u128
diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md
index 66ce159..b5941a8 100644
--- a/gcc/config/s390/vector.md
+++ b/gcc/config/s390/vector.md
@@ -30,6 +30,12 @@
(define_mode_iterator V_HW [V16QI V8HI V4SI V2DI V1TI TI V2DF
(V4SF "TARGET_VXE") (V1TF "TARGET_VXE")
(TF "TARGET_VXE")])
+(define_mode_iterator V_HW1 [V16QI V8HI V4SI V2DI V1TI V2DF
+ (V4SF "TARGET_VXE") (V1TF "TARGET_VXE")
+ (TF "TARGET_VXE")])
+(define_mode_iterator V_HW2 [V16QI V8HI V4SI V2DI V2DF (V4SF "TARGET_VXE")
+ (V1TF "TARGET_VXE") (TF "TARGET_VXE")])
+(define_mode_iterator V_HW3 [V16QI V8HI V4SI V2DI V1TI TI V4SF V2DF V1TF TF])
(define_mode_iterator VT_HW_HSDT [V8HI V4SI V4SF V2DI V2DF V1TI V1TF TI TF])
(define_mode_iterator V_HW_HSD [V8HI V4SI (V4SF "TARGET_VXE") V2DI V2DF])
@@ -39,8 +45,12 @@
; All full size integer vector modes supported in a vector register + TImode
(define_mode_iterator VIT_HW [V16QI V8HI V4SI V2DI V1TI TI])
+(define_mode_iterator VIT_HW_VXE3_T [V16QI V8HI V4SI V2DI (V1TI "TARGET_VXE3") (TI "TARGET_VXE3")])
+(define_mode_iterator VIT_HW_VXE3_DT [V16QI V8HI V4SI (V2DI "TARGET_VXE3") (V1TI "TARGET_VXE3") (TI "TARGET_VXE3")])
(define_mode_iterator VI_HW [V16QI V8HI V4SI V2DI])
+(define_mode_iterator VI_HW_VXE3 [V16QI V8HI V4SI (V2DI "TARGET_VXE3")])
(define_mode_iterator VI_HW_QHS [V16QI V8HI V4SI])
+(define_mode_iterator VI_HW_SDT [V4SI V2DI V1TI TI])
(define_mode_iterator VI_HW_HSD [V8HI V4SI V2DI])
(define_mode_iterator VI_HW_HSDT [V8HI V4SI V2DI V1TI TI])
(define_mode_iterator VI_HW_HS [V8HI V4SI])
@@ -54,14 +64,15 @@
; All integer vector modes supported in a vector register + TImode
(define_mode_iterator VIT [V1QI V2QI V4QI V8QI V16QI V1HI V2HI V4HI V8HI V1SI V2SI V4SI V1DI V2DI V1TI TI])
(define_mode_iterator VI [V1QI V2QI V4QI V8QI V16QI V1HI V2HI V4HI V8HI V1SI V2SI V4SI V1DI V2DI])
+(define_mode_iterator VI_VXE3 [V1QI V2QI V4QI V8QI V16QI V1HI V2HI V4HI V8HI V1SI V2SI V4SI V1DI (V2DI "TARGET_VXE3")])
(define_mode_iterator VI_QHS [V1QI V2QI V4QI V8QI V16QI V1HI V2HI V4HI V8HI V1SI V2SI V4SI])
(define_mode_iterator VFT [(V1SF "TARGET_VXE") (V2SF "TARGET_VXE") (V4SF "TARGET_VXE")
V1DF V2DF
(V1TF "TARGET_VXE") (TF "TARGET_VXE")])
-; All modes present in V_HW and VFT.
-(define_mode_iterator V_HW_FT [V16QI V8HI V4SI V2DI (V1TI "TARGET_VXE") V1DF
+; All modes present in V_HW1 and VFT.
+(define_mode_iterator V_HW1_FT [V16QI V8HI V4SI V2DI V1TI V1DF
V2DF (V1SF "TARGET_VXE") (V2SF "TARGET_VXE")
(V4SF "TARGET_VXE") (V1TF "TARGET_VXE")
(TF "TARGET_VXE")])
@@ -139,7 +150,8 @@
(define_mode_attr w [(V1QI "") (V2QI "") (V4QI "") (V8QI "") (V16QI "")
(V1HI "w") (V2HI "w") (V4HI "w") (V8HI "w")
(V1SI "") (V2SI "") (V4SI "")
- (V1DI "") (V2DI "")])
+ (V1DI "") (V2DI "")
+ (V1TI "") (TI "")])
; Resulting mode of a vector comparison. For floating point modes an
; integer vector mode with the same element size is picked.
@@ -173,7 +185,7 @@
(define_mode_attr vec_double [(V1QI "V1HI") (V2QI "V1HI") (V4QI "V2HI") (V8QI "V4HI") (V16QI "V8HI")
(V1HI "V1SI") (V2HI "V1SI") (V4HI "V2SI") (V8HI "V4SI")
(V1SI "V1DI") (V2SI "V1DI") (V4SI "V2DI")
- (V1DI "V1TI") (V2DI "V1TI")
+ (V1DI "V1TI") (V2DI "TI")
(V1SF "V1DF") (V2SF "V1DF") (V4SF "V2DF")])
; Vector with shrinked element size but twice the number of elements.
@@ -1121,11 +1133,11 @@
"vs<bhfgq>\t%v0,%v1,%v2"
[(set_attr "op_type" "VRR")])
-; vmlb, vmlhw, vmlf
+; vmlb, vmlhw, vmlf, vmlg, vmlq
(define_insn "mul<mode>3"
- [(set (match_operand:VI_QHS 0 "register_operand" "=v")
- (mult:VI_QHS (match_operand:VI_QHS 1 "register_operand" "v")
- (match_operand:VI_QHS 2 "register_operand" "v")))]
+ [(set (match_operand:VIT_HW_VXE3_DT 0 "register_operand" "=v")
+ (mult:VIT_HW_VXE3_DT (match_operand:VIT_HW_VXE3_DT 1 "register_operand" "v")
+ (match_operand:VIT_HW_VXE3_DT 2 "register_operand" "v")))]
"TARGET_VX"
"vml<bhfgq><w>\t%v0,%v1,%v2"
[(set_attr "op_type" "VRR")])
@@ -1541,41 +1553,41 @@
"vmxl<bhfgq>\t%v0,%v1,%v2"
[(set_attr "op_type" "VRR")])
-; vmeb, vmeh, vmef
+; vmeb, vmeh, vmef, vmeg
(define_insn "vec_widen_smult_even_<mode>"
- [(set (match_operand:<vec_double> 0 "register_operand" "=v")
- (unspec:<vec_double> [(match_operand:VI_QHS 1 "register_operand" "v")
- (match_operand:VI_QHS 2 "register_operand" "v")]
+ [(set (match_operand:<vec_double> 0 "register_operand" "=v")
+ (unspec:<vec_double> [(match_operand:VI_VXE3 1 "register_operand" "v")
+ (match_operand:VI_VXE3 2 "register_operand" "v")]
UNSPEC_VEC_SMULT_EVEN))]
"TARGET_VX"
"vme<bhfgq>\t%v0,%v1,%v2"
[(set_attr "op_type" "VRR")])
-; vmleb, vmleh, vmlef
+; vmleb, vmleh, vmlef, vmleg
(define_insn "vec_widen_umult_even_<mode>"
- [(set (match_operand:<vec_double> 0 "register_operand" "=v")
- (unspec:<vec_double> [(match_operand:VI_QHS 1 "register_operand" "v")
- (match_operand:VI_QHS 2 "register_operand" "v")]
+ [(set (match_operand:<vec_double> 0 "register_operand" "=v")
+ (unspec:<vec_double> [(match_operand:VI_VXE3 1 "register_operand" "v")
+ (match_operand:VI_VXE3 2 "register_operand" "v")]
UNSPEC_VEC_UMULT_EVEN))]
"TARGET_VX"
"vmle<bhfgq>\t%v0,%v1,%v2"
[(set_attr "op_type" "VRR")])
-; vmob, vmoh, vmof
+; vmob, vmoh, vmof, vmog
(define_insn "vec_widen_smult_odd_<mode>"
- [(set (match_operand:<vec_double> 0 "register_operand" "=v")
- (unspec:<vec_double> [(match_operand:VI_QHS 1 "register_operand" "v")
- (match_operand:VI_QHS 2 "register_operand" "v")]
+ [(set (match_operand:<vec_double> 0 "register_operand" "=v")
+ (unspec:<vec_double> [(match_operand:VI_VXE3 1 "register_operand" "v")
+ (match_operand:VI_VXE3 2 "register_operand" "v")]
UNSPEC_VEC_SMULT_ODD))]
"TARGET_VX"
"vmo<bhfgq>\t%v0,%v1,%v2"
[(set_attr "op_type" "VRR")])
-; vmlob, vmloh, vmlof
+; vmlob, vmloh, vmlof, vmlog
(define_insn "vec_widen_umult_odd_<mode>"
- [(set (match_operand:<vec_double> 0 "register_operand" "=v")
- (unspec:<vec_double> [(match_operand:VI_QHS 1 "register_operand" "v")
- (match_operand:VI_QHS 2 "register_operand" "v")]
+ [(set (match_operand:<vec_double> 0 "register_operand" "=v")
+ (unspec:<vec_double> [(match_operand:VI_VXE3 1 "register_operand" "v")
+ (match_operand:VI_VXE3 2 "register_operand" "v")]
UNSPEC_VEC_UMULT_ODD))]
"TARGET_VX"
"vmlo<bhfgq>\t%v0,%v1,%v2"
diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md
index 89cd520..abdc583 100644
--- a/gcc/config/s390/vx-builtins.md
+++ b/gcc/config/s390/vx-builtins.md
@@ -520,23 +520,23 @@
; swapped in s390-c.cc when we get here.
(define_insn "vsel<mode>"
- [(set (match_operand:V_HW_FT 0 "register_operand" "=v")
- (ior:V_HW_FT
- (and:V_HW_FT (match_operand:V_HW_FT 1 "register_operand" "v")
- (match_operand:V_HW_FT 3 "register_operand" "v"))
- (and:V_HW_FT (not:V_HW_FT (match_dup 3))
- (match_operand:V_HW_FT 2 "register_operand" "v"))))]
+ [(set (match_operand:V_HW1_FT 0 "register_operand" "=v")
+ (ior:V_HW1_FT
+ (and:V_HW1_FT (match_operand:V_HW1_FT 1 "register_operand" "v")
+ (match_operand:V_HW1_FT 3 "register_operand" "v"))
+ (and:V_HW1_FT (not:V_HW1_FT (match_dup 3))
+ (match_operand:V_HW1_FT 2 "register_operand" "v"))))]
"TARGET_VX"
"vsel\t%v0,%1,%2,%3"
[(set_attr "op_type" "VRR")])
(define_insn "*vsel<mode>_swapped"
- [(set (match_operand:V_HW_FT 0 "register_operand" "=v")
- (ior:V_HW_FT
- (and:V_HW_FT (not:V_HW_FT (match_operand:V_HW_FT 3 "register_operand" "v"))
- (match_operand:V_HW_FT 1 "register_operand" "v"))
- (and:V_HW_FT (match_dup 3)
- (match_operand:V_HW_FT 2 "register_operand" "v"))))]
+ [(set (match_operand:V_HW1_FT 0 "register_operand" "=v")
+ (ior:V_HW1_FT
+ (and:V_HW1_FT (not:V_HW1_FT (match_operand:V_HW1_FT 3 "register_operand" "v"))
+ (match_operand:V_HW1_FT 1 "register_operand" "v"))
+ (and:V_HW1_FT (match_dup 3)
+ (match_operand:V_HW1_FT 2 "register_operand" "v"))))]
"TARGET_VX"
"vsel\t%v0,%2,%1,%3"
[(set_attr "op_type" "VRR")])
@@ -612,19 +612,19 @@
; Vector unpack high
-; vuphb, vuphh, vuphf
+; vuphb, vuphh, vuphf, vuphg
(define_insn "vec_unpackh<mode>"
- [(set (match_operand:<vec_double> 0 "register_operand" "=v")
- (unspec:<vec_double> [(match_operand:VI_HW_QHS 1 "register_operand" "v")]
+ [(set (match_operand:<vec_double> 0 "register_operand" "=v")
+ (unspec:<vec_double> [(match_operand:VI_HW_VXE3 1 "register_operand" "v")]
UNSPEC_VEC_UNPACKH))]
"TARGET_VX"
"vuph<bhfgq>\t%v0,%v1"
[(set_attr "op_type" "VRR")])
-; vuplhb, vuplhh, vuplhf
+; vuplhb, vuplhh, vuplhf, vuplhg
(define_insn "vec_unpackh_l<mode>"
- [(set (match_operand:<vec_double> 0 "register_operand" "=v")
- (unspec:<vec_double> [(match_operand:VI_HW_QHS 1 "register_operand" "v")]
+ [(set (match_operand:<vec_double> 0 "register_operand" "=v")
+ (unspec:<vec_double> [(match_operand:VI_HW_VXE3 1 "register_operand" "v")]
UNSPEC_VEC_UNPACKH_L))]
"TARGET_VX"
"vuplh<bhfgq>\t%v0,%v1"
@@ -633,19 +633,19 @@
; Vector unpack low
-; vuplb, vuplhw, vuplf
+; vuplb, vuplhw, vuplf, vuplg
(define_insn "vec_unpackl<mode>"
- [(set (match_operand:<vec_double> 0 "register_operand" "=v")
- (unspec:<vec_double> [(match_operand:VI_HW_QHS 1 "register_operand" "v")]
+ [(set (match_operand:<vec_double> 0 "register_operand" "=v")
+ (unspec:<vec_double> [(match_operand:VI_HW_VXE3 1 "register_operand" "v")]
UNSPEC_VEC_UNPACKL))]
"TARGET_VX"
"vupl<bhfgq><w>\t%v0,%v1"
[(set_attr "op_type" "VRR")])
-; vupllb, vupllh, vupllf
+; vupllb, vupllh, vupllf, vupllg
(define_insn "vec_unpackl_l<mode>"
- [(set (match_operand:<vec_double> 0 "register_operand" "=v")
- (unspec:<vec_double> [(match_operand:VI_HW_QHS 1 "register_operand" "v")]
+ [(set (match_operand:<vec_double> 0 "register_operand" "=v")
+ (unspec:<vec_double> [(match_operand:VI_HW_VXE3 1 "register_operand" "v")]
UNSPEC_VEC_UNPACKL_L))]
"TARGET_VX"
"vupll<bhfgq>\t%v0,%v1"
@@ -708,24 +708,24 @@
; Vector average
-; vavgb, vavgh, vavgf, vavgg
+; vavgb, vavgh, vavgf, vavgg, vavgq
(define_insn "vec_avg<mode>"
- [(set (match_operand:VI_HW 0 "register_operand" "=v")
- (unspec:VI_HW [(match_operand:VI_HW 1 "register_operand" "v")
- (match_operand:VI_HW 2 "register_operand" "v")]
- UNSPEC_VEC_AVG))]
+ [(set (match_operand:VIT_HW_VXE3_T 0 "register_operand" "=v")
+ (unspec:VIT_HW_VXE3_T [(match_operand:VIT_HW_VXE3_T 1 "register_operand" "v")
+ (match_operand:VIT_HW_VXE3_T 2 "register_operand" "v")]
+ UNSPEC_VEC_AVG))]
"TARGET_VX"
"vavg<bhfgq>\t%v0,%v1,%v2"
[(set_attr "op_type" "VRR")])
; Vector average logical
-; vavglb, vavglh, vavglf, vavglg
+; vavglb, vavglh, vavglf, vavglg, vavglq
(define_insn "vec_avgu<mode>"
- [(set (match_operand:VI_HW 0 "register_operand" "=v")
- (unspec:VI_HW [(match_operand:VI_HW 1 "register_operand" "v")
- (match_operand:VI_HW 2 "register_operand" "v")]
- UNSPEC_VEC_AVGU))]
+ [(set (match_operand:VIT_HW_VXE3_T 0 "register_operand" "=v")
+ (unspec:VIT_HW_VXE3_T [(match_operand:VIT_HW_VXE3_T 1 "register_operand" "v")
+ (match_operand:VIT_HW_VXE3_T 2 "register_operand" "v")]
+ UNSPEC_VEC_AVGU))]
"TARGET_VX"
"vavgl<bhfgq>\t%v0,%v1,%v2"
[(set_attr "op_type" "VRR")])
@@ -872,10 +872,10 @@
[(set_attr "op_type" "VRR")])
(define_insn "vec_gfmsum_accum_128"
- [(set (match_operand:V16QI 0 "register_operand" "=v")
- (unspec:V16QI [(match_operand:V2DI 1 "register_operand" "v")
+ [(set (match_operand:TI 0 "register_operand" "=v")
+ (unspec:TI [(match_operand:V2DI 1 "register_operand" "v")
(match_operand:V2DI 2 "register_operand" "v")
- (match_operand:V16QI 3 "register_operand" "v")]
+ (match_operand:TI 3 "register_operand" "v")]
UNSPEC_VEC_GFMSUM_ACCUM_128))]
"TARGET_VX"
"vgfmag\t%v0,%v1,%v2,%v3"
@@ -892,37 +892,37 @@
; Vector multiply and add high
; vec_mladd -> vec_vmal
-; vmalb, vmalh, vmalf, vmalg
+; vmalb, vmalh, vmalf, vmalg, vmalq
(define_insn "vec_vmal<mode>"
- [(set (match_operand:VI_HW_QHS 0 "register_operand" "=v")
- (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "v")
- (match_operand:VI_HW_QHS 2 "register_operand" "v")
- (match_operand:VI_HW_QHS 3 "register_operand" "v")]
- UNSPEC_VEC_VMAL))]
+ [(set (match_operand:VIT_HW_VXE3_DT 0 "register_operand" "=v")
+ (unspec:VIT_HW_VXE3_DT [(match_operand:VIT_HW_VXE3_DT 1 "register_operand" "v")
+ (match_operand:VIT_HW_VXE3_DT 2 "register_operand" "v")
+ (match_operand:VIT_HW_VXE3_DT 3 "register_operand" "v")]
+ UNSPEC_VEC_VMAL))]
"TARGET_VX"
"vmal<bhfgq><w>\t%v0,%v1,%v2,%v3"
[(set_attr "op_type" "VRR")])
; vec_mhadd -> vec_vmah/vec_vmalh
-; vmahb; vmahh, vmahf, vmahg
+; vmahb; vmahh, vmahf, vmahg, vmahq
(define_insn "vec_vmah<mode>"
- [(set (match_operand:VI_HW_QHS 0 "register_operand" "=v")
- (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "v")
- (match_operand:VI_HW_QHS 2 "register_operand" "v")
- (match_operand:VI_HW_QHS 3 "register_operand" "v")]
- UNSPEC_VEC_VMAH))]
+ [(set (match_operand:VIT_HW_VXE3_DT 0 "register_operand" "=v")
+ (unspec:VIT_HW_VXE3_DT [(match_operand:VIT_HW_VXE3_DT 1 "register_operand" "v")
+ (match_operand:VIT_HW_VXE3_DT 2 "register_operand" "v")
+ (match_operand:VIT_HW_VXE3_DT 3 "register_operand" "v")]
+ UNSPEC_VEC_VMAH))]
"TARGET_VX"
"vmah<bhfgq>\t%v0,%v1,%v2,%v3"
[(set_attr "op_type" "VRR")])
-; vmalhb; vmalhh, vmalhf, vmalhg
+; vmalhb; vmalhh, vmalhf, vmalhg, vmalhq
(define_insn "vec_vmalh<mode>"
- [(set (match_operand:VI_HW_QHS 0 "register_operand" "=v")
- (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "v")
- (match_operand:VI_HW_QHS 2 "register_operand" "v")
- (match_operand:VI_HW_QHS 3 "register_operand" "v")]
- UNSPEC_VEC_VMALH))]
+ [(set (match_operand:VIT_HW_VXE3_DT 0 "register_operand" "=v")
+ (unspec:VIT_HW_VXE3_DT [(match_operand:VIT_HW_VXE3_DT 1 "register_operand" "v")
+ (match_operand:VIT_HW_VXE3_DT 2 "register_operand" "v")
+ (match_operand:VIT_HW_VXE3_DT 3 "register_operand" "v")]
+ UNSPEC_VEC_VMALH))]
"TARGET_VX"
"vmalh<bhfgq>\t%v0,%v1,%v2,%v3"
[(set_attr "op_type" "VRR")])
@@ -932,8 +932,8 @@
; vmaeb; vmaeh, vmaef, vmaeg
(define_insn "vec_vmae<mode>"
[(set (match_operand:<vec_double> 0 "register_operand" "=v")
- (unspec:<vec_double> [(match_operand:VI_HW_QHS 1 "register_operand" "v")
- (match_operand:VI_HW_QHS 2 "register_operand" "v")
+ (unspec:<vec_double> [(match_operand:VI_HW_VXE3 1 "register_operand" "v")
+ (match_operand:VI_HW_VXE3 2 "register_operand" "v")
(match_operand:<vec_double> 3 "register_operand" "v")]
UNSPEC_VEC_VMAE))]
"TARGET_VX"
@@ -943,8 +943,8 @@
; vmaleb; vmaleh, vmalef, vmaleg
(define_insn "vec_vmale<mode>"
[(set (match_operand:<vec_double> 0 "register_operand" "=v")
- (unspec:<vec_double> [(match_operand:VI_HW_QHS 1 "register_operand" "v")
- (match_operand:VI_HW_QHS 2 "register_operand" "v")
+ (unspec:<vec_double> [(match_operand:VI_HW_VXE3 1 "register_operand" "v")
+ (match_operand:VI_HW_VXE3 2 "register_operand" "v")
(match_operand:<vec_double> 3 "register_operand" "v")]
UNSPEC_VEC_VMALE))]
"TARGET_VX"
@@ -956,8 +956,8 @@
; vmaob; vmaoh, vmaof, vmaog
(define_insn "vec_vmao<mode>"
[(set (match_operand:<vec_double> 0 "register_operand" "=v")
- (unspec:<vec_double> [(match_operand:VI_HW_QHS 1 "register_operand" "v")
- (match_operand:VI_HW_QHS 2 "register_operand" "v")
+ (unspec:<vec_double> [(match_operand:VI_HW_VXE3 1 "register_operand" "v")
+ (match_operand:VI_HW_VXE3 2 "register_operand" "v")
(match_operand:<vec_double> 3 "register_operand" "v")]
UNSPEC_VEC_VMAO))]
"TARGET_VX"
@@ -967,8 +967,8 @@
; vmalob; vmaloh, vmalof, vmalog
(define_insn "vec_vmalo<mode>"
[(set (match_operand:<vec_double> 0 "register_operand" "=v")
- (unspec:<vec_double> [(match_operand:VI_HW_QHS 1 "register_operand" "v")
- (match_operand:VI_HW_QHS 2 "register_operand" "v")
+ (unspec:<vec_double> [(match_operand:VI_HW_VXE3 1 "register_operand" "v")
+ (match_operand:VI_HW_VXE3 2 "register_operand" "v")
(match_operand:<vec_double> 3 "register_operand" "v")]
UNSPEC_VEC_VMALO))]
"TARGET_VX"
@@ -980,22 +980,22 @@
; vec_mulh -> vec_smulh/vec_umulh
-; vmhb, vmhh, vmhf
+; vmhb, vmhh, vmhf, vmhg, vmhq
(define_insn "vec_smulh<mode>"
- [(set (match_operand:VI_HW_QHS 0 "register_operand" "=v")
- (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "v")
- (match_operand:VI_HW_QHS 2 "register_operand" "v")]
- UNSPEC_VEC_SMULT_HI))]
+ [(set (match_operand:VIT_HW_VXE3_DT 0 "register_operand" "=v")
+ (unspec:VIT_HW_VXE3_DT [(match_operand:VIT_HW_VXE3_DT 1 "register_operand" "v")
+ (match_operand:VIT_HW_VXE3_DT 2 "register_operand" "v")]
+ UNSPEC_VEC_SMULT_HI))]
"TARGET_VX"
"vmh<bhfgq>\t%v0,%v1,%v2"
[(set_attr "op_type" "VRR")])
-; vmlhb, vmlhh, vmlhf
+; vmlhb, vmlhh, vmlhf, vmlhg, vmlhq
(define_insn "vec_umulh<mode>"
- [(set (match_operand:VI_HW_QHS 0 "register_operand" "=v")
- (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "v")
- (match_operand:VI_HW_QHS 2 "register_operand" "v")]
- UNSPEC_VEC_UMULT_HI))]
+ [(set (match_operand:VIT_HW_VXE3_DT 0 "register_operand" "=v")
+ (unspec:VIT_HW_VXE3_DT [(match_operand:VIT_HW_VXE3_DT 1 "register_operand" "v")
+ (match_operand:VIT_HW_VXE3_DT 2 "register_operand" "v")]
+ UNSPEC_VEC_UMULT_HI))]
"TARGET_VX"
"vmlh<bhfgq>\t%v0,%v1,%v2"
[(set_attr "op_type" "VRR")])
generated by cgit v1.1 at 2025-03-10 03:38:14 +0000